[U-Boot] p2020 and Micron MT47H64M16HR memory and u-boot

[wzab]

Hi,

We are debugging a system equipped with p2020 processor and micron
MT47H64M16HR DDR2 memories.
Unfortunately we can't get u-boot loading correctly to the DDR.
We've managed to get u-boot loaded to the L2 cache and to put our own
DDR debugging code into the board initialization code (namely into
board specific ddr.c file).
It seems, that the DDR is not initialized properly by standard u-boot
DDR2 parameters for P1_P2_RDB board.

We've analyzed thoroughly the datasheet:
http://www.micron.com/parts/dram/ddr2-sdram/~/media/Documents/Products/Data%20Sheet/DRAM/4561GbDDR2.ashx
and we've found that the required initialization procedure (see pp.
86-88 in the datasheet) is quite complicated.
The p2020 contains a versatile DDR controller, but it seems to be
unable to perform e.g. multiple loading of the MR register (first with
DLL reset command as required in step 8, and then without that command
as required in step 11).

So my question is:
1. Has anybody managed to force the internal P2020 DDR controller to
succesfully initialize this memory?
2. Has anybody prepared the DDR initialization data for boot_format,
so that P2020 on-chip loader is able to initialize this memory
executing the configuration data form the SD card? (In fact this seems
to be necessary, as before the DDR is initialized we are not able to
load the u-boot! We were not able to build correctly working L2 cache
loaded u-boot for P2020 :-( ).
3. Has anybody implemented the initialization procedure for that
memory for u-boot?
--
TIA & Regards,
Wojtek