[U-Boot] [PATCH v3] DaVinci: correct MDSTAT.STATE mask

[Sergei Shtylyov]

MDSTAT.STATE occupies bits 0..5 according to all available documentation, so fix
the mask which previously was leaving out the intermediate state indicator bit.

While at it, introduce two #define's for that mask -- unfortunately, we can't
use a single #define as the assembly code can't include <asm/arch/hardware.h>
due to C-specfic constructs in it.

Signed-off-by: Sergei Shtylyov <sshtylyov at ru.mvista.com>

---
 arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S |    8 +++++---
 arch/arm/cpu/arm926ejs/davinci/psc.c           |    4 ++--
 arch/arm/include/asm/arch-davinci/hardware.h   |    2 ++
 3 files changed, 9 insertions(+), 5 deletions(-)

Index: u-boot/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
===================================================================
--- u-boot.orig/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
+++ u-boot/arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S
@@ -45,6 +45,8 @@
 
 #include <config.h>
 
+#define MDSTAT_STATE	0x3f
+
 .globl	lowlevel_init
 lowlevel_init:
 
@@ -268,7 +270,7 @@ checkStatClkStop:
 checkDDRStatClkStop:
 	ldr	r6, MDSTAT_DDR2
 	ldr	r7, [r6]
-	and	r7, r7, $0x1f
+	and	r7, r7, $MDSTAT_STATE
 	cmp	r7, $0x03
 	bne	checkDDRStatClkStop
 
@@ -343,7 +345,7 @@ checkStatClkStop2:
 checkDDRStatClkStop2:
 	ldr	r6, MDSTAT_DDR2
 	ldr	r7, [r6]
-	and	r7, r7, $0x1f
+	and	r7, r7, $MDSTAT_STATE
 	cmp	r7, $0x01
 	bne	checkDDRStatClkStop2
 
@@ -374,7 +376,7 @@ checkStatClkEn2:
 checkDDRStatClkEn2:
 	ldr	r6, MDSTAT_DDR2
 	ldr	r7, [r6]
-	and	r7, r7, $0x1f
+	and	r7, r7, $MDSTAT_STATE
 	cmp	r7, $0x03
 	bne	checkDDRStatClkEn2
 
Index: u-boot/arch/arm/cpu/arm926ejs/davinci/psc.c
===================================================================
--- u-boot.orig/arch/arm/cpu/arm926ejs/davinci/psc.c
+++ u-boot/arch/arm/cpu/arm926ejs/davinci/psc.c
@@ -83,7 +83,7 @@ void lpsc_on(unsigned int id)
 	while (readl(ptstat) & 0x01)
 		continue;
 
-	if ((readl(mdstat) & 0x1f) == 0x03)
+	if ((readl(mdstat) & PSC_MDSTAT_STATE) == 0x03)
 		return; /* Already on and enabled */
 
 	writel(readl(mdctl) | 0x03, mdctl);
@@ -114,7 +114,7 @@ void lpsc_on(unsigned int id)
 
 	while (readl(ptstat) & 0x01)
 		continue;
-	while ((readl(mdstat) & 0x1f) != 0x03)
+	while ((readl(mdstat) & PSC_MDSTAT_STATE) != 0x03)
 		continue;
 }
 
Index: u-boot/arch/arm/include/asm/arch-davinci/hardware.h
===================================================================
--- u-boot.orig/arch/arm/include/asm/arch-davinci/hardware.h
+++ u-boot/arch/arm/include/asm/arch-davinci/hardware.h
@@ -347,6 +347,8 @@ struct davinci_psc_regs {
 
 #endif /* CONFIG_SOC_DA8XX */
 
+#define PSC_MDSTAT_STATE		0x3f
+
 #ifndef CONFIG_SOC_DA8XX
 
 /* Miscellania... */