[U-Boot] [PATCH] i.MX6: arm2: Add AXI cache and Qos setting

[Dirk Behme]

Do the same AXI cache and Qos settings done already in the
SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of
the display IDMA channel.

Signed-off-by: Dirk Behme <dirk.behme at de.bosch.com>
CC: Jason Chen <b02280 at freescale.com>
CC: Jason Liu <r64343 at freescale.com>
CC: Stefano Babic <sbabic at denx.de>
CC: Fabio Estevam <festevam at gmail.com>
---
 board/freescale/mx6qarm2/imximage.cfg |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg
index 5f0ee0d..ceecbf9 100644
--- a/board/freescale/mx6qarm2/imximage.cfg
+++ b/board/freescale/mx6qarm2/imximage.cfg
@@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000
 DATA 4 0x020c4078 0x00FFF300
 DATA 4 0x020c407c 0x0F0000C3
 DATA 4 0x020c4080 0x000003FF
+
+# enable AXI cache for VDOA/VPU/IPU
+DATA 4 0x020e0010 0xF00000FF
+# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7
+DATA 4 0x020e0018 0x007F007F
+DATA 4 0x020e001c 0x007F007F
-- 
1.7.0.4