[U-Boot] [PATCH 2/4] mx53_smd: add spi nor support

Terry Lv r65388 at freescale.com
Tue Aug 14 12:59:43 CEST 2012


Add spi nor support to mx53 smd, including iomux, configs, etc.
To test spi nor on mx53 smd:
MX53SMD U-Boot > sf probe 0:21249
JEDEC ID: 0x202016
m25p32 (4096 Kbytes)
SF: Detected m25p32 with page size 0 Bytes, total 4 MiB

Here, 21249 is integer of hex 0x5301. 0x01 is cs and 0x53 is active gpio
number.

Signed-off-by: Terry Lv <r65388 at freescale.com>
---
 board/freescale/mx53smd/mx53smd.c |   63 +++++++++++++++++++++++++++++++++++++
 include/configs/mx53smd.h         |   17 ++++++++++
 2 files changed, 80 insertions(+), 0 deletions(-)

diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c
index 87fa7fa..abb1e9b 100644
--- a/board/freescale/mx53smd/mx53smd.c
+++ b/board/freescale/mx53smd/mx53smd.c
@@ -127,6 +127,65 @@ static void setup_iomux_fec(void)
 			PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE);
 }
 
+#ifdef CONFIG_MXC_SPI
+static void setup_iomux_spi(u8 bus, u8 ss)
+{
+	switch (bus) {
+	case 0:
+		/* SCLK */
+		mxc_request_iomux(MX53_PIN_EIM_D16, IOMUX_CONFIG_ALT4);
+		mxc_iomux_set_pad(MX53_PIN_EIM_D16,
+				PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH);
+		mxc_iomux_set_input(MX53_ECSPI1_IPP_CSPI_CLK_IN_SELECT_INPUT,
+				0x3);
+
+		/* MISO */
+		mxc_request_iomux(MX53_PIN_EIM_D17, IOMUX_CONFIG_ALT4);
+		mxc_iomux_set_pad(MX53_PIN_EIM_D17,
+				PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH);
+		mxc_iomux_set_input(MX53_ECSPI1_IPP_IND_MISO_SELECT_INPUT,
+				0x3);
+
+		/* MOSI */
+		mxc_request_iomux(MX53_PIN_EIM_D18, IOMUX_CONFIG_ALT4);
+		mxc_iomux_set_pad(MX53_PIN_EIM_D18,
+				PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH);
+		mxc_iomux_set_input(MX53_ECSPI1_IPP_IND_MOSI_SELECT_INPUT,
+				0x3);
+
+		if (0 == ss) {
+			mxc_request_iomux(MX53_PIN_EIM_EB2,
+						IOMUX_CONFIG_ALT4);
+			mxc_iomux_set_pad(MX53_PIN_EIM_EB2,
+				PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH);
+			mxc_iomux_set_input(
+				MX53_ECSPI1_IPP_IND_SS_B_1_SELECT_INPUT,
+				0x3);
+
+			mxc_request_iomux(MX53_PIN_EIM_EB2, IOMUX_CONFIG_ALT1);
+			mxc_iomux_set_pad(MX53_PIN_EIM_EB2,
+					PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH);
+		} else if (1 == ss){
+			mxc_request_iomux(MX53_PIN_EIM_D19, IOMUX_CONFIG_ALT4);
+			mxc_iomux_set_pad(MX53_PIN_EIM_D19,
+				PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH);
+			mxc_iomux_set_input(
+					MX53_ECSPI1_IPP_IND_SS_B_2_SELECT_INPUT,
+					0x2);
+
+			mxc_request_iomux(MX53_PIN_EIM_D19, IOMUX_CONFIG_ALT1);
+			mxc_iomux_set_pad(MX53_PIN_EIM_D19,
+					PAD_CTL_HYS_ENABLE | PAD_CTL_DRV_HIGH);
+		}
+		break;
+	case 1:
+	case 2:
+	default:
+		break;
+	}
+}
+#endif
+
 #ifdef CONFIG_FSL_ESDHC
 struct fsl_esdhc_cfg esdhc_cfg[1] = {
 	{MMC_SDHC1_BASE_ADDR, 1},
@@ -203,6 +262,10 @@ int board_early_init_f(void)
 {
 	setup_iomux_uart();
 	setup_iomux_fec();
+#if defined(CONFIG_MXC_SPI) && defined(CONFIG_SPI_FLASH) \
+	&& defined(CONFIG_SPI_FLASH_BUS) && defined(CONFIG_SPI_FLASH_CS)
+	setup_iomux_spi(CONFIG_SPI_FLASH_BUS, CONFIG_SPI_FLASH_CS);
+#endif
 
 	return 0;
 }
diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h
index 48b32dd..2597562 100644
--- a/include/configs/mx53smd.h
+++ b/include/configs/mx53smd.h
@@ -65,6 +65,23 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 
+/* SPI Configs*/
+#define CONFIG_CMD_SPI
+#define CONFIG_MXC_SPI
+#define CONFIG_SPI_VER_2_3	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
+#define CONFIG_CSPI3_BASE_ADDR	CSPI3_BASE_ADDR
+
+/* SPI Flash Configs */
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_M25P80 1
+#define CONFIG_SF_DEFAULT_SPEED 25000000
+#define CONFIG_SF_DEFAULT_MODE  (SPI_MODE_0)
+#define CONFIG_SPI_FLASH_BUS	0
+#define CONFIG_SPI_FLASH_CS	1
+
 /* Eth Configs */
 #define CONFIG_HAS_ETH1
 #define CONFIG_MII
-- 
1.7.0.4




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