[U-Boot] [PATCH 4/4] mxc_spi: apply new mxc_spi version configs to other soc configs

Terry Lv r65388 at freescale.com
Tue Aug 14 13:00:05 CEST 2012


Apply new mxc_spi version configs to other soc configs.

Signed-off-by: Terry Lv <r65388 at freescale.com>
---
 arch/arm/include/asm/arch-mx31/imx-regs.h |    4 ++++
 include/configs/efikamx.h                 |    4 ++++
 include/configs/flea3.h                   |    3 +++
 include/configs/imx31_litekit.h           |    5 +++++
 include/configs/imx31_phycore.h           |    4 ++++
 include/configs/mx31ads.h                 |    4 ++++
 include/configs/mx31pdk.h                 |    4 ++++
 include/configs/mx35pdk.h                 |    8 +++++++-
 include/configs/mx51evk.h                 |    4 ++++
 include/configs/qong.h                    |    4 ++++
 include/configs/tt01.h                    |    5 +++++
 11 files changed, 48 insertions(+), 1 deletions(-)

diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 0147920..4f9c78c 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -24,6 +24,10 @@
 #ifndef __ASM_ARCH_MX31_IMX_REGS_H
 #define __ASM_ARCH_MX31_IMX_REGS_H
 
+#define CSPI1_BASE_ADDR	0x43fa4000
+#define CSPI2_BASE_ADDR	0x50010000
+#define CSPI3_BASE_ADDR	0x53f84000
+
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index a07c8b5..1fe558d 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -99,6 +99,10 @@
 
 #define CONFIG_HARD_SPI
 #define CONFIG_MXC_SPI
+#define CONFIG_SPI_VER_2_3	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
+#define CONFIG_CSPI3_BASE_ADDR	CSPI3_BASE_ADDR
 #define CONFIG_DEFAULT_SPI_BUS		1
 #define CONFIG_DEFAULT_SPI_MODE		(SPI_MODE_0 | SPI_CS_HIGH)
 
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index d88c578..0d85ed5 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -71,6 +71,9 @@
 #define CONFIG_SYS_I2C_SPEED		100000
 #define CONFIG_SYS_I2C_SLAVE		0xfe
 #define CONFIG_MXC_SPI
+#define CONFIG_SPI_VER_0_7	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
 #define CONFIG_MXC_GPIO
 
 /*
diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h
index 1455ea2..d213ed0 100644
--- a/include/configs/imx31_litekit.h
+++ b/include/configs/imx31_litekit.h
@@ -69,6 +69,11 @@
 
 #define CONFIG_HARD_SPI		1
 #define CONFIG_MXC_SPI		1
+#define CONFIG_SPI_VER_0_5	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
+#define CONFIG_CSPI3_BASE_ADDR	CSPI3_BASE_ADDR
+
 #define CONFIG_DEFAULT_SPI_BUS	1
 #define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_0 | SPI_CS_HIGH)
 
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index 1b75197..f7c2e2d 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -213,6 +213,10 @@
 
 #define CONFIG_HARD_SPI
 #define CONFIG_MXC_SPI
+#define CONFIG_SPI_VER_0_5	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
+#define CONFIG_CSPI3_BASE_ADDR	CSPI3_BASE_ADDR
 #define CONFIG_CMD_SPI
 
 #define CONFIG_S6E63D6
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index 7e011ae..eff70de 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -65,6 +65,10 @@
 
 #define CONFIG_HARD_SPI		1
 #define CONFIG_MXC_SPI		1
+#define CONFIG_SPI_VER_0_5	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
+#define CONFIG_CSPI3_BASE_ADDR	CSPI3_BASE_ADDR
 #define CONFIG_DEFAULT_SPI_BUS	1
 #define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_0 | SPI_CS_HIGH)
 #define CONFIG_MXC_GPIO
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 4253c3e..8210f97 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -67,6 +67,10 @@
 
 #define CONFIG_HARD_SPI
 #define CONFIG_MXC_SPI
+#define CONFIG_SPI_VER_0_5	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
+#define CONFIG_CSPI3_BASE_ADDR	CSPI3_BASE_ADDR
 #define CONFIG_DEFAULT_SPI_BUS	1
 #define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_0 | SPI_CS_HIGH)
 
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 32ed609..26eb1d5 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -62,9 +62,15 @@
 #define CONFIG_SYS_I2C_MX35_PORT1
 #define CONFIG_SYS_I2C_SPEED		100000
 #define CONFIG_SYS_I2C_SLAVE		0xfe
-#define CONFIG_MXC_SPI
 #define CONFIG_MXC_GPIO
 
+/*
+ * SPI Configs
+ */
+#define CONFIG_MXC_SPI
+#define CONFIG_SPI_VER_0_7	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
 
 /*
  * PMIC Configs
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 7c7544f..0c23d04 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -68,6 +68,10 @@
 #define CONFIG_CMD_SPI
 
 #define CONFIG_MXC_SPI
+#define CONFIG_SPI_VER_2_3	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
+#define CONFIG_CSPI3_BASE_ADDR	CSPI3_BASE_ADDR
 
 /* PMIC Controller */
 #define CONFIG_PMIC
diff --git a/include/configs/qong.h b/include/configs/qong.h
index 3346802..d2bc39d 100644
--- a/include/configs/qong.h
+++ b/include/configs/qong.h
@@ -56,6 +56,10 @@
 #define CONFIG_HW_WATCHDOG
 
 #define CONFIG_MXC_SPI
+#define CONFIG_SPI_VER_0_5	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
+#define CONFIG_CSPI3_BASE_ADDR	CSPI3_BASE_ADDR
 #define CONFIG_DEFAULT_SPI_BUS	1
 #define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_0 | SPI_CS_HIGH)
 #define CONFIG_RTC_MC13XXX
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index 6ef25cd..1de0f10 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -151,6 +151,11 @@
 #define CONFIG_SYS_MX31_UART2
 
 #define CONFIG_MXC_SPI
+#define CONFIG_SPI_VER_0_5	1
+#define CONFIG_CSPI1_BASE_ADDR	CSPI1_BASE_ADDR
+#define CONFIG_CSPI2_BASE_ADDR	CSPI2_BASE_ADDR
+#define CONFIG_CSPI3_BASE_ADDR	CSPI3_BASE_ADDR
+
 #define CONFIG_MXC_GPIO
 
 /* MC13783 connected to CSPI3 and SS0 */
-- 
1.7.0.4




More information about the U-Boot mailing list