[U-Boot] [PATCH] ARMV7: Fix duplicate use of "b" parameter in ACTIM_CTRLA definition.

Peter Barada peter.barada at logicpd.com
Tue Feb 7 17:32:33 CET 2012


ACTIM_CTRLA macro errently passes "b" parameter to ACTIM_CTRLA_TRAS()
instead of "c".  To make usage more clear, replace all single-letter
macro parameters with more descriptive parameter names.

Signed-off-by: Peter Barada <peter.barada at logicpd.com>
---
 arch/arm/include/asm/arch-omap3/mem.h |   40 ++++++++++++++++----------------
 1 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index 4ca929e..661974d 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -80,15 +80,15 @@ enum {
 #define ACTIM_CTRLA_TDPL(v)	(((v) & 0x07) << 6)	/*  8:6  */
 #define ACTIM_CTRLA_TDAL(v)	(v & 0x1F)		/*  4:0  */
 
-#define ACTIM_CTRLA(a,b,c,d,e,f,g,h)		\
-		ACTIM_CTRLA_TRFC(a)	|	\
-		ACTIM_CTRLA_TRC(b)	|	\
-		ACTIM_CTRLA_TRAS(b)	|	\
-		ACTIM_CTRLA_TRP(d)	|	\
-		ACTIM_CTRLA_TRCD(e)	|	\
-		ACTIM_CTRLA_TRRD(f)	|	\
-		ACTIM_CTRLA_TDPL(g)	|	\
-		ACTIM_CTRLA_TDAL(h)
+#define ACTIM_CTRLA(trfc,trc,tras,trp,trcd,trdd,tdpl,tdal)	\
+		ACTIM_CTRLA_TRFC(trfc)	|	\
+		ACTIM_CTRLA_TRC(trc)	|	\
+		ACTIM_CTRLA_TRAS(tras)	|	\
+		ACTIM_CTRLA_TRP(trp)	|	\
+		ACTIM_CTRLA_TRCD(trcd)	|	\
+		ACTIM_CTRLA_TRRD(trrd)	|	\
+		ACTIM_CTRLA_TDPL(tdpl)	|	\
+		ACTIM_CTRLA_TDAL(tdal)
 
 /* Helper macros to arrive at value of the SDRC_ACTIM_CTRLB register. */
 #define ACTIM_CTRLB_TWTR(v)	(((v) & 0x03) << 16)	/* 17:16 */
@@ -96,11 +96,11 @@ enum {
 #define ACTIM_CTRLB_TXP(v)	(((v) & 0x07) << 8)	/* 10:8  */
 #define ACTIM_CTRLB_TXSR(v)	(v & 0xFF)		/*  7:0  */
 
-#define ACTIM_CTRLB(a,b,c,d)			\
-		ACTIM_CTRLB_TWTR(a)	|	\
-		ACTIM_CTRLB_TCKE(b)	|	\
-		ACTIM_CTRLB_TXP(b)	|	\
-		ACTIM_CTRLB_TXSR(d)
+#define ACTIM_CTRLB(twtr,tcke,txp,txsr)			\
+		ACTIM_CTRLB_TWTR(twtr)	|	\
+		ACTIM_CTRLB_TCKE(tcke)	|	\
+		ACTIM_CTRLB_TXP(txp)	|	\
+		ACTIM_CTRLB_TXSR(txsr)
 
 /*
  * Values used in the MCFG register.  Only values we use today
@@ -111,16 +111,16 @@ enum {
 #define V_MCFG_DEEPPD_EN		(0x1 << 3)
 #define V_MCFG_B32NOT16_32		(0x1 << 4)
 #define V_MCFG_BANKALLOCATION_RBC	(0x2 << 6)	/* 6:7 */
-#define V_MCFG_RAMSIZE(a)		((((a)/(1024*1024))/2) << 8) /* 8:17 */
+#define V_MCFG_RAMSIZE(ramsize)		((((ramsize)/(1024*1024))/2) << 8) /* 8:17 */
 #define V_MCFG_ADDRMUXLEGACY_FLEX	(0x1 << 19)
 #define V_MCFG_CASWIDTH_10B		(0x5 << 20)	/* 20:22 */
-#define V_MCFG_RASWIDTH(a)		((a) << 24)	/* 24:26 */
+#define V_MCFG_RASWIDTH(raswidth)	((raswidth) << 24)	/* 24:26 */
 
 /* Macro to construct MCFG */
-#define MCFG(a, b)						\
-		V_MCFG_RASWIDTH(b) | V_MCFG_CASWIDTH_10B |	\
-		V_MCFG_ADDRMUXLEGACY_FLEX | V_MCFG_RAMSIZE(a) |	\
-		V_MCFG_BANKALLOCATION_RBC |			\
+#define MCFG(raswidth, ramsize)						\
+		V_MCFG_RASWIDTH(raswidth) | V_MCFG_CASWIDTH_10B |	\
+		V_MCFG_ADDRMUXLEGACY_FLEX | V_MCFG_RAMSIZE(ramsize) |	\
+		V_MCFG_BANKALLOCATION_RBC |				\
 		V_MCFG_B32NOT16_32 | V_MCFG_DEEPPD_EN | V_MCFG_RAMTYPE_DDR
 
 /* Hynix part of Overo (165MHz optimized) 6.06ns */
-- 
1.7.1



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