Hi, NAND boot implementation for P2020RDB/P1020RDB first copies u-boot to L2 SRAM, and then to DDR. This works for P2020, where L2 size is 512K, but breaks on P1020, where L2 size is 256K. Looks like NAND SPL for these platforms should not rely on L2 cache, and copy u-boot directly into DDR. Felix.