[U-Boot] [PATCH v3 08/14] tegra20: add SPL config options for tegra20 boards

[Stephen Warren]

On 06/08/2012 03:16 PM, Allen Martin wrote:
> Add SPL options to tegra20 config files and enable SPL build for
> tegra20 boards in boards.cfg

> diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h

> @@ -183,7 +183,7 @@
>  #define PHYS_SDRAM_1		TEGRA20_SDRC_CS0
>  #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
>  
> -#define CONFIG_SYS_TEXT_BASE	0x00108000
> +#define CONFIG_SYS_TEXT_BASE	0x00208000

Conceptually this change is fine, I just wonder if we need to move this
up as far as 0x00208000; doesn't that reserve an entire MiB of space for
the SPL, which means the U-Boot image as a whole will always grow an
entire MiB, hence there's another MiB of data to copy from flash when
booting? IIRC, the entire AVP+A9 U-Boot is only very roughly 256K and
presumably the SPL is much smaller, so can we bump this define down a bit?