[U-Boot] [PATCH] ARM: support for cache coherent allocations
Ilya Yanok
ilya.yanok at cogentembedded.com
Mon Jun 18 20:15:06 CEST 2012
Hi Marek,
[sorry for copying, forget to CC the list]
On Sat, Jun 16, 2012 at 2:29 AM, Marek Vasut <marek.vasut at gmail.com> wrote:
> Hm, can't we just punch a hole in the MMU table at runtime instead of
> preallocating it like this?
>
It's allocated at runtime now, do you mean allocate it on demand? Good
point, Probably we can malloc big enough block and make it uncached
directly from dma_alloc_coherent(). Is it what you suggest?
Also, what is this for? Can we not simply flush/invalidate the caches?
>
flush/invalidate can be racy for some hardware. Sometimes we need to write
some field to DMA descriptor and then read another one. And because one
cannot flush/invalidate individual bytes write/flush can destroy the field
updated by hardware. (Well, we can invalidate/read before write/flush but
that introduces a race).
Regards, Ilya.
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