[U-Boot] [PATCH] ARM: support for cache coherent allocations

[Marek Vasut]

Dear Ilya Yanok,

> Hi Marek,
> 
> [sorry for copying, forget to CC the list]
> 
> On Sat, Jun 16, 2012 at 2:29 AM, Marek Vasut <marek.vasut at gmail.com> wrote:
> > Hm, can't we just punch a hole in the MMU table at runtime instead of
> > preallocating it like this?
> 
>  It's allocated at runtime now, do you mean allocate it on demand? Good
> point, Probably we can malloc big enough block and make it uncached
> directly from dma_alloc_coherent(). Is it what you suggest?

Kind of ... I mean rather insert an entry into MMU table at runtime that says 
"this region is uncached". But that'd need some hack in the mallocator now that 
I think about it. It might not be as simple as I thought at first.

On the other hand, most MMUs allow you to allocate stuff with 4k density, which 
should be ok.

> Also, what is this for? Can we not simply flush/invalidate the caches?
> 
> 
>  flush/invalidate can be racy for some hardware. Sometimes we need to write
> some field to DMA descriptor and then read another one. And because one
> cannot flush/invalidate individual bytes write/flush can destroy the field
> updated by hardware. (Well, we can invalidate/read before write/flush but
> that introduces a race).

But that's shitty hardware. Do you really need to do it? Where? I fixed similar 
issue in fec_mxc.c recently.

> 
> Regards, Ilya.

Best regards,
Marek Vasut