[U-Boot] RFC - how to support multipl DRAM chips in a single SPL build?

Tom Rini trini at ti.com
Wed Mar 7 23:21:24 CET 2012


On Wed, Mar 7, 2012 at 3:13 PM, Wolfgang Denk <wd at denx.de> wrote:
> Dear Tom Rini,
>
> In message <CA+M6bXkgRyPFf2iLyiP6rptnkdU3=zG_wCpQhLvcjMDp1Of9PA at mail.gmail.com> you wrote:
>>
>> Note that beagleboard handles this today, and the intent is that we
>> should be able to support a wide range of choices, with whatever
>> method is best on the board.  For example (and hiding from Wolfgang)
>> in am335x land, we plan to poke the EEPROM over i2c and see what it
>> tells us for a board and pick out based on that.
>
> There should be no need for that.  If the possible configuration
> options are know, auto-detection is possible as well.

So throw the DDR3 timings at the part, if it works, great, if not try
the DDR2 timings?

-- 
Tom


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