[U-Boot] [PATCH 1/2] mx6: Fix reset cause for Power On Reset case

[Fabio Estevam]

After booting mx6qsabrelite from POR the following is reported:

CPU:   Freescale i.MX61 family rev1.0 at 792 MHz                                
Reset cause: unknown reset

This is because both the POR and WDOG bits are set after reset.

Fix this by also checking both bits in the POR case.  

Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
---
 arch/arm/cpu/armv7/imx-common/cpu.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/imx-common/cpu.c b/arch/arm/cpu/armv7/imx-common/cpu.c
index 1e30ae5..6d7486b 100644
--- a/arch/arm/cpu/armv7/imx-common/cpu.c
+++ b/arch/arm/cpu/armv7/imx-common/cpu.c
@@ -44,6 +44,7 @@ static char *get_reset_cause(void)
 
 	switch (cause) {
 	case 0x00001:
+	case 0x00011:
 		return "POR";
 	case 0x00004:
 		return "CSU";
-- 
1.7.1