[U-Boot] [PATCH V3] net: fec_mxc: allow use with cache enabled

Eric Nelson eric.nelson at boundarydevices.com
Tue Mar 13 19:42:29 CET 2012


Thanks Mike,

On 03/13/2012 07:41 AM, Mike Frysinger wrote:
> On Tuesday 13 March 2012 10:04:31 Eric Nelson wrote:
>> --- a/drivers/net/fec_mxc.c
>> +++ b/drivers/net/fec_mxc.c
>>
>> +#if ARCH_DMA_MINALIGN>  CONFIG_SYS_CACHELINE_SIZE
>> +#define CONFIG_FEC_ALIGN ARCH_DMA_MINALIGN
>> +#else
>> +#define CONFIG_FEC_ALIGN CONFIG_SYS_CACHELINE_SIZE
>> +#endif
>
> i don't think this is something you should be checking.  if this is an actual
> problem (and i don't think it is), it's something we should handle in common
> code.  if you need to dma from memory, then use ARCH_DMA_MINALIGN.
>
Marek, you've mentioned some restrictions for other i.MX devices.

Are you aware of any problem collapsing this?

Note that other CPUs will need to have CONFIG_SYS_CACHELINE_SIZE to
prevent the default of 64.

>> +#error	"CONFIG_FEC_ALIGN must be multiple of 16!"
>> +#error	"PKTALIGN must be multiple of CONFIG_FEC_ALIGN!"
>
> please don't use tabs after #define/#error/etc... just one space

Ok. I'll address in V4.


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