[U-Boot] [PATCH 6/7] OMAP5: DPLL core lock for OMAP5432

[R, Sricharan]

Hi Lokesh,

> No need to Unlock DPLL initially.
> DDR3 can work at normal OPP from initialozation
>
  Why is it so ?
  The commit log should make it clear why is it
  nessecary to do the initialisations at higher frequency and
 that becomes the reason for this patch.

Thanks,
 Sricharan