[U-Boot] [PATCH 0/9] x86: Patches to enable running U-Boot from coreboot

[Simon Glass]

This series carries on from Gabe Black's work to upstream support for
running U-Boot from coreboot.

Aditional follow-on patches are also required, depending on feedback
here.


Gabe Black (4):
  x86: Allow excluding reset handling code from u-boot.
  x86: Add some missing includes.
  x86: coreboot: Tell u-boot about PCI bus 0 when initializing
  x86: coreboot: Implement recursively scanning PCI busses

Simon Glass (3):
  x86: Change board baud_rate to ulong
  x86: Add initial memory barrier macros
  x86: coreboot: Enable LPC TPM and CONFIG_NO_RESET_CODE

Stefan Reinauer (1):
  x86: coreboot: Move non-board specific files to coreboot arch
    directory

Vadim Bendebury (1):
  x86: coreboot: Modify u-boot code to allow building coreboot payload

 arch/x86/cpu/coreboot/Makefile                     |    2 +
 .../x86/cpu}/coreboot/coreboot.c                   |    0
 .../coreboot_pci.c => arch/x86/cpu/coreboot/pci.c  |   35 ++++++++++++++++++
 arch/x86/cpu/resetvec.S                            |    6 +++
 arch/x86/cpu/start16.S                             |    4 ++
 arch/x86/cpu/u-boot.lds                            |    3 ++
 arch/x86/include/asm/global_data.h                 |    2 +
 arch/x86/include/asm/io.h                          |    8 ++++
 arch/x86/include/asm/pci.h                         |    2 +-
 arch/x86/include/asm/u-boot.h                      |    5 ++-
 board/chromebook-x86/coreboot/Makefile             |    2 -
 board/chromebook-x86/coreboot/config.mk            |   37 ++++++++++++++++++++
 board/chromebook-x86/coreboot/coreboot_start16.S   |    6 +++
 board/eNET/eNET_start16.S                          |    4 ++
 common/cmd_bdinfo.c                                |    2 +-
 include/configs/coreboot.h                         |    6 +++-
 16 files changed, 118 insertions(+), 6 deletions(-)
 rename {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c (100%)
 rename board/chromebook-x86/coreboot/coreboot_pci.c => arch/x86/cpu/coreboot/pci.c (51%)
 create mode 100644 board/chromebook-x86/coreboot/config.mk

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1.7.7.3