[U-Boot] [PATCH 2/3] x86: Enable ICH6 GPIO controller for coreboot

[Simon Glass]

Hi Graeme,

On Sat, Oct 20, 2012 at 3:22 PM, Graeme Russ <graeme.russ at gmail.com> wrote:
> Hi Simon,
>
> On Oct 21, 2012 8:45 AM, "Simon Glass" <sjg at chromium.org> wrote:
>>
>> Coreboot uses this controller to implement GPIO access.
>
> All coreboot supported boards, or just the ones you are dealing with ATM?
>
> To give you some perspective, I'm working on n AMD E350 based board. Does it
> have ICH6 GPIO?
>
> I've come to a conclusion that U-Boot as a coreboot payload will be the norm
> for the foreseeable futre, so let's make board specific support as flexible
> as possible.

If that's the case then we might need a little rethink. Are you saying
that coreboot might become the only board, or that the coreboot
functions should move into generic x86 code?

I am not sure about your board GPIO, but you could test it I suppose.

On ARM we use the fdt to describe what peripherals are there and what
are not. I suppose we could do the same thing here.

Regards,
Simon

>
> Regards,
>
> Graeme
>
>>
>> Signed-off-by: Simon Glass <sjg at chromium.org>
>> ---
>>  include/configs/coreboot.h |    3 +++
>>  1 files changed, 3 insertions(+), 0 deletions(-)
>>
>> diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
>> index 0e89242..2e084ee 100644
>> --- a/include/configs/coreboot.h
>> +++ b/include/configs/coreboot.h
>> @@ -99,6 +99,9 @@
>>  #undef CONFIG_VIDEO
>>  #undef CONFIG_CFB_CONSOLE
>>
>> +/* x86 GPIOs are accessed through a PCI device */
>> +#define CONFIG_INTEL_ICH6_GPIO
>> +
>>  /*-----------------------------------------------------------------------
>>   * Command line configuration.
>>   */
>> --
>> 1.7.7.3
>>