[U-Boot] [PATCH 2/3] x86: Enable ICH6 GPIO controller for coreboot

Graeme Russ graeme.russ at gmail.com
Sun Oct 21 00:57:18 CEST 2012


Hi Simon,

On Oct 21, 2012 9:32 AM, "Simon Glass" <sjg at chromium.org> wrote:
>
> Hi Graeme,
>
> On Sat, Oct 20, 2012 at 3:22 PM, Graeme Russ <graeme.russ at gmail.com>
wrote:
> > Hi Simon,
> >
> > On Oct 21, 2012 8:45 AM, "Simon Glass" <sjg at chromium.org> wrote:
> >>
> >> Coreboot uses this controller to implement GPIO access.
> >
> > All coreboot supported boards, or just the ones you are dealing with
ATM?
> >
> > To give you some perspective, I'm working on n AMD E350 based board.
Does it
> > have ICH6 GPIO?
> >
> > I've come to a conclusion that U-Boot as a coreboot payload will be the
norm
> > for the foreseeable futre, so let's make board specific support as
flexible
> > as possible.
>
> If that's the case then we might need a little rethink. Are you saying
> that coreboot might become the only board, or that the coreboot
> functions should move into generic x86 code?

Make coreboot a SoC and then have individual board configs which use it

>
> I am not sure about your board GPIO, but you could test it I suppose.
>
> On ARM we use the fdt to describe what peripherals are there and what
> are not. I suppose we could do the same thing here.

I was wondering how to pass more info from coreboot to U-Boot, maybe we can
use FDT

Regards,

Graeme


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