[U-Boot] [PATCH 4/4] powerpc/b4860qds: Add B4860QDS board
Andy Fleming
afleming at gmail.com
Mon Oct 22 22:55:22 CEST 2012
On Thu, Oct 11, 2012 at 12:13 PM, York Sun <yorksun at freescale.com> wrote:
> B4860QDS is a high-performance computing evaluation, development and
> test platform supporting the B4860 QorIQ Power Architecture™ processor.
>
> VSC3316 is 11.5Gbps 16x16 Asynchronous cross-point switch and
> VSC3308 is 11.5Gbps 8x8 Asynchronous cross-point switch,
> these crosspoint switches commute SerDes lanes to different destinations
> depending upon their programming in accordance with SerDes protocol
>
> 1) Add defines for VSC3316/3308 crosspoint switches
> 2) Add define for PCA-I2C bus multiplexer
> 3) Add support in b4860qds board file to configure these
> crosspoint switches based on the SerDes1 and SerDes2 protocol
> 4) Add VSC3316 and VSC3308 Mux entries for all possible crosspoint
> connections on b4860qds board
>
> B4860 has FMANv3 so the External PHYs are accessible using dedicated MDIO blocks
> at addresse 0x4fc0000 0x4fd0000.
> B4860 has only SGMII, no RGMII, single FMAN.
>
> Slot and PHYs details on B4860QDS
> -----------------------------------
> - Two on board SGMII PHYs connected through serdes1 via crossbar
> - Two slots available via AMC2PEX connector through serdes2
> - Slot1 (PCIe/ SGMII riser/ XAUI)
> connected to serdes2 lanes 0,1,2,3
> - Slot2 (PCIe/ SGMII Riser/ XAUI)
> connected to serdes2 lanes 4,5,6,7 via crossbar
>
> Cross bar is a Vitesse switch on B4860 QDS which is connected to serdes
> on one side(input) and the PHYs(output) on the other side.
> So this device needs to be configured to get the right serdes lanes go to the
> right PHYs and slots. Cross bar configurations done based on the RCW.
>
> Currently the below mentioned are tested and supported:
> 1. sgmii5 and sgmii6 are connected to onboard PHYs
> srds1_prtcl=0x2A
> 2. sgmii 1, sgmiii2, sgmii3, sgmii4 via SGMII riser card on Slot#1
> srds2_prtcl=0x18
>
> Signed-off-by: York Sun <yorksun at freescale.com>
> Signed-off-by: Prabhakar Kushwaha <prabhakar at freescale.com>
> Signed-off-by: Shaveta Leekha <shaveta at freescale.com>
> Signed-off-by: Priyanka Jain <Priyanka.Jain at freescale.com>
> Signed-off-by: Poonam Aggrwal <poonam.aggrwal at freescale.com>
> Signed-off-by: Roy Zang <tie-fei.zang at freescale.com>
> Signed-off-by: Sandeep Singh <Sandeep at freescale.com>
> ---
Please note that, due to compile issues brought on by not defining
QIXIS_RST_CTL_RESET and other similar constants, the B4860QDS code
cannot be applied to the tree. Internal review indicates that these
features are implemented differently on B4QDS, and the code needs to
be updated to reflect that.
Andy
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