[U-Boot] [PATCH v1 2/8] am335x_evm: add nand pinmux definition
Ilya Yanok
ilya.yanok at cogentembedded.com
Tue Oct 30 23:47:37 CET 2012
Add NAND pins mux settings for AM335X devices. Enable NAND pins
for AM335X EVM board.
Signed-off-by: Ilya Yanok <ilya.yanok at cogentembedded.com>
---
board/ti/am335x/mux.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 80becd5..a46c680 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -362,6 +362,27 @@ static struct module_pin_mux mii1_pin_mux[] = {
{-1},
};
+#ifdef CONFIG_NAND_OMAP_GPMC
+static struct module_pin_mux nand_pin_mux[] = {
+ {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
+ {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
+ {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
+ {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
+ {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
+ {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */
+ {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */
+ {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */
+ {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
+ {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */
+ {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
+ {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
+ {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
+ {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
+ {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
+ {-1},
+};
+#endif
+
/*
* Configure the pin mux for the module
*/
@@ -435,11 +456,16 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
unsigned short profile = detect_daughter_board_profile();
configure_module_pin_mux(rgmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
+#ifdef CONFIG_NAND_OMAP_GPMC
+ configure_module_pin_mux(nand_pin_mux);
+#endif
/* In profile #2 i2c1 and spi0 conflict. */
if (profile & ~PROFILE_2)
configure_module_pin_mux(i2c1_pin_mux);
else if (profile == PROFILE_2) {
+#ifndef CONFIG_NAND_OMAP_GPMC
configure_module_pin_mux(mmc1_pin_mux);
+#endif
configure_module_pin_mux(spi0_pin_mux);
}
} else if (!strncmp(header->name, "A335X_SK", HDR_NAME_LEN)) {
--
1.7.10.2 (Apple Git-33)
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