[U-Boot] [PATCH V2 17/21] mx6: soc: add get_cpu_type

[Troy Kisky]

Add function to return the processor type.

i.e. MX6Q, MX6DL, MX6SOLO, MX6SOLOLITE

Signed-off-by: Troy Kisky <troy.kisky at boundarydevices.com>
---
 arch/arm/cpu/armv7/mx6/soc.c              |   26 ++++++++++++++++++++++++++
 arch/arm/include/asm/arch-mx6/sys_proto.h |    6 ++++++
 2 files changed, 32 insertions(+)

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index 7380ffe..5fce682 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -44,6 +44,32 @@ u32 get_cpu_rev(void)
 	return system_rev;
 }
 
+struct scu_regs {
+	uint32_t	ctrl;
+	uint32_t	config;
+	uint32_t	status;
+	uint32_t	invalidate;
+	uint32_t	fpga_rev;
+};
+
+signed char cpu_type[] = {MXC_CPU_MX6SOLO, MXC_CPU_MX6DL, -1, MXC_CPU_MX6Q};
+
+int get_cpu_type(void)
+{
+	struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR;
+	uint32_t reg = readl(&scu->config) & 3;
+	int type = cpu_type[reg];
+
+	if (!reg) {
+		u32 cpu_type = readl(ANATOP_BASE_ADDR + 0x280);
+
+		cpu_type >>= 16;
+		if (cpu_type == 0x60)
+			type = MXC_CPU_MX6SL;       /* this is a soloLite */
+	}
+	return type;
+}
+
 void init_aips(void)
 {
 	struct aipstz_regs *aips1, *aips2;
diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
index 711b30d..997fc8e 100644
--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
@@ -28,6 +28,12 @@
 
 u32 get_cpu_rev(void);
 
+#define MXC_CPU_MX6SL		60
+#define MXC_CPU_MX6DL		61
+#define MXC_CPU_MX6SOLO		62
+#define MXC_CPU_MX6Q		63
+
+int get_cpu_type(void);
 void set_vddsoc(u32 mv);
 
 /*
-- 
1.7.9.5