[U-Boot] [PATCH v2 5/9] tegra30: add SBC1 to periph id mapping table

[Simon Glass]

On Sat, Jan 12, 2013 at 1:07 AM, Allen Martin <amartin at nvidia.com> wrote:
> SBC1 is SPI controller 1 on tegra30
>
> Signed-off-by: Allen Martin <amartin at nvidia.com>

Acked-by: Simon Glass <sjg at chromium.org>

> ---
>  arch/arm/cpu/tegra30-common/clock.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/cpu/tegra30-common/clock.c b/arch/arm/cpu/tegra30-common/clock.c
> index c67a2e1..db5ac1e 100644
> --- a/arch/arm/cpu/tegra30-common/clock.c
> +++ b/arch/arm/cpu/tegra30-common/clock.c
> @@ -318,7 +318,7 @@ static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {
>
>         /* 40 */
>         NONE(KFUSE),
> -       NONE(SBC1),     /* SBC1, 0x34, is this SPI1? */
> +       PERIPHC_SBC1,
>         PERIPHC_NOR,
>         NONE(RESERVED43),
>         PERIPHC_SBC2,
> --
> 1.7.10.4
>