[U-Boot] [PATCH V5 02/10] EXYNOS5: FDT: Add DWMMC device node data

[Amar]

This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.

Signed-off-by: Vivek Gautam <gautam.vivek at samsung.com>
Signed-off-by: Amar <amarendra.xt at samsung.com>
---
Changes since V1:
        1)Added binding file for DWMMC device node at the location
        "doc/device-tree-bindings/exynos/dwmmc.txt".
        2)Removed the propname 'index' from device node.
        3)Prefixed the vendor name 'samsung' before propname in device node.

Changes since V2:
        1)Updation of commit message and resubmition of proper patch set.

Changes since V3:
        No change.

Changes since V4:
        1)Updated the doc/device-tree-bindings/exynos/dwmmc.txt with more
        information regarding the property 'samsung,timing'.
        2)Replaced the name 'dwmmc' with 'mmc'.

 arch/arm/dts/exynos5250.dtsi              | 31 +++++++++++++++++++
 board/samsung/dts/exynos5250-smdk5250.dts | 22 ++++++++++++++
 doc/device-tree-bindings/exynos/dwmmc.txt | 49 +++++++++++++++++++++++++++++++
 3 files changed, 102 insertions(+)
 create mode 100644 doc/device-tree-bindings/exynos/dwmmc.txt

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index ed8c8dd..6c08eb7 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -151,4 +151,35 @@
 		};
 	};
 
+	mmc at 12200000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5250-dwmmc";
+		reg = <0x12200000 0x1000>;
+		interrupts = <0 75 0>;
+	};
+
+	mmc at 12210000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5250-dwmmc";
+		reg = <0x12210000 0x1000>;
+		interrupts = <0 76 0>;
+	};
+
+	mmc at 12220000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5250-dwmmc";
+		reg = <0x12220000 0x1000>;
+		interrupts = <0 77 0>;
+	};
+
+	mmc at 12230000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "samsung,exynos5250-dwmmc";
+		reg = <0x12230000 0x1000>;
+		interrupts = <0 78 0>;
+	};
 };
diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts
index cbfab6f..1d3e42b 100644
--- a/board/samsung/dts/exynos5250-smdk5250.dts
+++ b/board/samsung/dts/exynos5250-smdk5250.dts
@@ -30,6 +30,10 @@
 		spi2 = "/spi at 12d40000";
 		spi3 = "/spi at 131a0000";
 		spi4 = "/spi at 131b0000";
+		mmc0 = "/mmc at 12200000";
+		mmc1 = "/mmc at 12210000";
+		mmc2 = "/mmc at 12220000";
+		mmc3 = "/mmc at 12230000";
 	};
 
 	sromc at 12250000 {
@@ -66,4 +70,22 @@
 			compatible = "maxim,max77686_pmic";
 		};
 	};
+
+	mmc at 12200000 {
+		samsung,bus-width = <8>;
+		samsung,timing = <1 3 3>;
+	};
+
+	mmc at 12210000 {
+		status = "disabled";
+	};
+
+	mmc at 12220000 {
+		samsung,bus-width = <4>;
+		samsung,timing = <1 2 3>;
+	};
+
+	mmc at 12230000 {
+		status = "disabled";
+	};
 };
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644
index 0000000..0054ace
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -0,0 +1,49 @@
+* Exynos 5250 DWC_mobile_storage
+
+The Exynos 5250 provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos 5250 DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+	- samsung,exynos5250-dwmmc: for exynos5250 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+	region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+	supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+	. Typically the bus width is 4 or 8.
+- samsung,timing: The timing values to be written into the
+	Drv/sample clock selection register of corresponding channel.
+	. It is comprised of 3 values corresponding to the 3 fileds
+	  'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register.
+	. SelClk_sample: Select sample clock among 8 shifted clocks.
+	. SelClk_drv: Select drv clock among 8 shifted clocks.
+	. DIVRATIO: Clock Divide ratio select.
+	. The above 3 values are used by the clock phase shifter.
+
+Example:
+
+mmc at 12200000 {
+	samsung,bus-width = <8>;
+	samsung,timing = <1 3 3>;
+}
+In the above example,
+	. The bus width is 8
+	. Timing is comprised of 3 values as explained below
+		1 - SelClk_sample
+		3 - SelClk_drv
+		3 - DIVRATIO
-- 
1.8.0