[U-Boot] [PATCH V5 05/10] EXYNOS5: DWMMC: Initialise the local variable to avoid unwanted results.

Simon Glass sjg at chromium.org
Sat Jan 26 21:09:01 CET 2013


On Tue, Jan 22, 2013 at 12:43 AM, Amar <amarendra.xt at samsung.com> wrote:
> This patch initialises the local variable 'shift' to zero.
> The uninitialised local variable 'shift' had garbage value and was
> resulting in unwnated results in the functions exynos5_get_mmc_clk()
> and exynos4_get_mmc_clk().
>
> Signed-off-by: Amar <amarendra.xt at samsung.com>

Acked-by: Simon Glass <sjg at chromium.org>

> ---
> Changes since V1:
>         1)Updated the function exynos5_mmc_set_clk_div() to receive
>         'device_i'd as input parameter instead of 'index'.
>
> Changes since V2:
>         1)Updation of commit message and resubmition of proper patch set.
>
> Changes since V3:
>         1)Removed the new API exynos5_mmc_set_clk_div() from clock.c,
>         because existing API set_mmc_clk() can be used to set mmc clock.
>
> Changes since V4:
>         1)Updated the subject line to reflect the changes present in this patch.
>         2)Changes of the file arch/arm/include/asm/arch-exynos/clk.h which
>         were present in this patch, have been moved out of this patch.
>
>  arch/arm/cpu/armv7/exynos/clock.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
> index 956427c..edce21c 100644
> --- a/arch/arm/cpu/armv7/exynos/clock.c
> +++ b/arch/arm/cpu/armv7/exynos/clock.c
> @@ -490,7 +490,7 @@ static unsigned long exynos4_get_mmc_clk(int dev_index)
>                 (struct exynos4_clock *)samsung_get_base_clock();
>         unsigned long uclk, sclk;
>         unsigned int sel, ratio, pre_ratio;
> -       int shift;
> +       int shift = 0;
>
>         sel = readl(&clk->src_fsys);
>         sel = (sel >> (dev_index << 2)) & 0xf;
> @@ -539,7 +539,7 @@ static unsigned long exynos5_get_mmc_clk(int dev_index)
>                 (struct exynos5_clock *)samsung_get_base_clock();
>         unsigned long uclk, sclk;
>         unsigned int sel, ratio, pre_ratio;
> -       int shift;
> +       int shift = 0;
>
>         sel = readl(&clk->src_fsys);
>         sel = (sel >> (dev_index << 2)) & 0xf;
> --
> 1.8.0
>


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