[U-Boot] [PATCH v3 01/17] sf: Add bank address register writing support
Simon Glass
sjg at chromium.org
Thu Jun 13 00:18:49 CEST 2013
Hi Jagan,
On Tue, Jun 11, 2013 at 12:23 PM, Jagannadha Sutradharudu Teki <
jagannadha.sutradharudu-teki at xilinx.com> wrote:
> This patch provides support to program a flash bank address
> register.
>
> extended/bank address register contains an information to access
> the 4th byte addressing in 3-byte address mode.
>
> Currently added an bank address register writing support for
> spansion flashes.
>
> reff' the spec for more details about bank addr register
> in Page-63, Table 8.16
> http://www.spansion.com/Support/Datasheets/S25FL128S_256S_00.pdf
>
> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
>
Reviewed-by: Simon Glass <sjg at chromium.org>
See comment below, perhaps a follow-on patch so you can get this in first?
> ---
> Changes for v3:
> - none
> Changes for v2:
> - none
>
> drivers/mtd/spi/spi_flash.c | 37
> ++++++++++++++++++++++++++++++++++++
> drivers/mtd/spi/spi_flash_internal.h | 6 ++++++
> include/spi_flash.h | 2 ++
> 3 files changed, 45 insertions(+)
>
> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
> index 0e38f59..7aba520 100644
> --- a/drivers/mtd/spi/spi_flash.c
> +++ b/drivers/mtd/spi/spi_flash.c
> @@ -278,6 +278,40 @@ int spi_flash_cmd_write_status(struct spi_flash
> *flash, u8 sr)
> return 0;
> }
>
> +int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
> +{
> + u8 cmd, idcode0;
> + int ret;
> +
> + idcode0 = flash->idcode0;
> + if (idcode0 == 0x01) {
>
I wonder why you need this to be hard-coded here? As a follow-on patch, I
suggest you have something in the probe function which decides which bank
addressing algorithm to use (e.g. winbond, ST, none). and then this code
can be:
switch (flash->bank_addr_algo) {
case SF_ALGO_WINBOND:
...
case SF_ALGO_ST:
...
}
> + cmd = CMD_BANKADDR_BRWR;
> + } else {
> + printf("SF: Unsupported bank addr write %02x\n", idcode0);
> + return -1;
> + }
> +
> + ret = spi_flash_cmd_write_enable(flash);
> + if (ret < 0) {
> + debug("SF: enabling write failed\n");
> + return ret;
> + }
> +
> + ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1);
> + if (ret) {
> + debug("SF: fail to write bank addr register\n");
> + return ret;
> + }
> +
> + ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
> + if (ret < 0) {
> + debug("SF: write bank addr register timed out\n");
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> #ifdef CONFIG_OF_CONTROL
> int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
> {
> @@ -422,6 +456,9 @@ struct spi_flash *spi_flash_probe(unsigned int bus,
> unsigned int cs,
> goto err_manufacturer_probe;
> }
>
> + /* store the manuf id, for performing specific flash ops */
> + flash->idcode0 = *idp;
> +
> #ifdef CONFIG_OF_CONTROL
> if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
> debug("SF: FDT decode error\n");
> diff --git a/drivers/mtd/spi/spi_flash_internal.h
> b/drivers/mtd/spi/spi_flash_internal.h
> index 141cfa8..6e38494 100644
> --- a/drivers/mtd/spi/spi_flash_internal.h
> +++ b/drivers/mtd/spi/spi_flash_internal.h
> @@ -28,6 +28,9 @@
> #define CMD_ERASE_64K 0xd8
> #define CMD_ERASE_CHIP 0xc7
>
> +/* Bank addr acess commands */
> +#define CMD_BANKADDR_BRWR 0x17
> +
> /* Common status */
> #define STATUS_WIP 0x01
>
> @@ -77,6 +80,9 @@ static inline int spi_flash_cmd_write_disable(struct
> spi_flash *flash)
> /* Program the status register. */
> int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
>
> +/* Program the bank address register */
> +int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel);
> +
> /*
> * Same as spi_flash_cmd_read() except it also claims/releases the SPI
> * bus. Used as common part of the ->read() operation.
> diff --git a/include/spi_flash.h b/include/spi_flash.h
> index 3b6a44e..5ea42e1 100644
> --- a/include/spi_flash.h
> +++ b/include/spi_flash.h
> @@ -38,6 +38,8 @@ struct spi_flash {
> u32 page_size;
> /* Erase (sector) size */
> u32 sector_size;
> + /* ID code0 */
> + u8 idcode0;
>
> void *memory_map; /* Address of read-only SPI flash access */
> int (*read)(struct spi_flash *flash, u32 offset,
> --
> 1.8.3
>
> Regards,
Simon
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