[U-Boot] [[PATCH]pandaboard: 1/1] Modification of Elpida DDR2 RAM for Pandaboard-ES Rev B3
Hardik Patel
hardik.patel at volansystech.com
Tue Oct 29 15:17:56 CET 2013
Tom, Dan,
Thanks for your feedback on patch.
If I understand correctly, you are suggesting to put static timing values
for RevB3(instead of putting it for auto detection) in "emif_get_reg_dump"
and "emif_get_dmm_regs_sdp" functions as we do it for other panda
revisions.
We have already figured out timing values for Elpida RAM on Rev B3.
However, We need a way to differentiate "Rev-B2" and "Rev-B3", as both
boards are very similar. We have checked that "omap_revision()" returns
same value on both B2 and B3.
We have found one difference between both revisions that we may use.
GPIO171 is '0' for Rev B1/B2, and it comes to '1' for Rev B3. We have
verified this between two boards.
* GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2
* GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3
Please suggest a correct way to differentiate between B2 and B3 in
"sdram_elpida.c", so that patch gets accepted.
Should we export and use "get_board_revision()" along with
"omap_revision()" in "sdram_elpida.c" to differentiate between B2 and B3?
In current code "get_board_revision()" is not exported to "sdram_elpida.c".
Thanks,
Hardik
On Mon, Oct 28, 2013 at 6:34 PM, Tom Rini <trini at ti.com> wrote:
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
>
> On 10/28/2013 08:51 AM, Dan Murphy wrote:
> > On 10/25/2013 10:42 AM, Hardik wrote:
> >> From: Hardik Patel <hardik.patel at volansystech.com>
> >>
> >>
> >> Signed-off-by: Hardik Patel <hardik.patel at volansystech.com> ---
> >> include/configs/omap4_common.h | 7 ++++++- 1 file changed, 6
> >> insertions(+), 1 deletion(-)
> >>
> >> diff --git a/include/configs/omap4_common.h
> >> b/include/configs/omap4_common.h index e9f2383..9aa4030 100644
> >> --- a/include/configs/omap4_common.h +++
> >> b/include/configs/omap4_common.h @@ -240,7 +240,12 @@ #define
> >> CONFIG_SYS_CACHELINE_SIZE 32
> >>
> >> /* Defines for SDRAM init */ -#define
> >> CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS + +/* + * Enable
> >> automatic sdram detection + * for detecting Elpida RAM on Rev B3
> >> + */ +#undef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
> >
> > Nak
> >
> > This is used on all other Panda revisions.
> >
> > Why are we just disabling this for all devices when one device is
> > the issue? And as discussed off line I have an older B3 which boots
> > fine on the uBoot mainline.
> >
> > So what is the difference between your B3 and my B3? Please answer
> > this to the community or point to a reference were one can
> > determine what B3 board they have
>
> I think we've got two issues here:
> a) Your B3 is apparently an early non-public rev.
> b) When we use the automatic timing calculation code, it then spits
> out what the values are (I would swear) so that you can then plug them
> back in.
>
> We should make B3 know what the right timing values to use are.
>
> - --
> Tom
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