[U-Boot] [[PATCH]pandaboard: 1/1] Modification of Elpida DDR2 RAM for Pandaboard-ES Rev B3
Tom Rini
trini at ti.com
Mon Oct 28 14:04:57 CET 2013
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On 10/28/2013 08:51 AM, Dan Murphy wrote:
> On 10/25/2013 10:42 AM, Hardik wrote:
>> From: Hardik Patel <hardik.patel at volansystech.com>
>>
>>
>> Signed-off-by: Hardik Patel <hardik.patel at volansystech.com> ---
>> include/configs/omap4_common.h | 7 ++++++- 1 file changed, 6
>> insertions(+), 1 deletion(-)
>>
>> diff --git a/include/configs/omap4_common.h
>> b/include/configs/omap4_common.h index e9f2383..9aa4030 100644
>> --- a/include/configs/omap4_common.h +++
>> b/include/configs/omap4_common.h @@ -240,7 +240,12 @@ #define
>> CONFIG_SYS_CACHELINE_SIZE 32
>>
>> /* Defines for SDRAM init */ -#define
>> CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS + +/* + * Enable
>> automatic sdram detection + * for detecting Elpida RAM on Rev B3
>> + */ +#undef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
>
> Nak
>
> This is used on all other Panda revisions.
>
> Why are we just disabling this for all devices when one device is
> the issue? And as discussed off line I have an older B3 which boots
> fine on the uBoot mainline.
>
> So what is the difference between your B3 and my B3? Please answer
> this to the community or point to a reference were one can
> determine what B3 board they have
I think we've got two issues here:
a) Your B3 is apparently an early non-public rev.
b) When we use the automatic timing calculation code, it then spits
out what the values are (I would swear) so that you can then plug them
back in.
We should make B3 know what the right timing values to use are.
- --
Tom
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