[U-Boot] How do ARM platform initialize DDR?

[Wolfgang Denk]

Dear York Sun,

In message <523B67D2.2050107 at freescale.com> you wrote:
>
> So for ARM platforms, the majority don't have the flexibility of using
> different DIMMs and/or clocks?

The majority of ARM systems are embedded designs which never use any
kind of DIMM, but raw soldered-on RAM chips.

> Does it make sense to share the Freescale DDR driver across ARM and
> Powerpc? Or does it make more sense to selectively copy the mpc8xxx DDR
> driver to Freescale ARM subfolder to start with. If the similarity

You are probably in a beter position to answer that than us - how many
ARM systems are there around that use the same memory controller as
the MPC8xxx?

> For those who is not familiar with, Freescale is extending products to
> ARM cores. I am expecting peripherals stay relatively close, so many
> driver can be reused.

Well, I'm not sure which exact products you might have in mind here,
but from what we've seen so far with the i.MX2x (and mxs), i.MX3x,
iMX5x and i.MX6 systems, there are commnon IP blocks like the FEC, but
so far I haven't seen this with the memory controller.

And I haven't seen any single FSL ARM board in our lab yet that was
using any kind ot DIMM or such.

Best regards,

Wolfgang Denk

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