[U-Boot] [PATCH] powerpc/t1040: fix i2c2 address on t1040qds and t104xrdb
Priyanka Jain
Priyanka.Jain at freescale.com
Tue Jul 1 09:37:30 CEST 2014
Hello Shengzhou,
T1040 has two dual I2C controller.
First Dual I2C Controller : 0x1180000 (first i2c bus), 0x1181000(second I2C bus)
Second Dual I2C Controller : 0x1190000 (third i2c bus), 0x1191000(fourth I2C bus)
My understanding is CONFIG_SYS_FSL_I2C_OFFSET is offset for first I2C controller and CONFIG_SYS_FSL_I2C2_OFFSET is offset for second I2C controller.
Have you checked for dual I2C controller, CONFIG_SYS_FSL_I2C2_OFFSET implies offset for second I2C bus, not the controller?
Regards
Priyanka
> -----Original Message-----
> From: u-boot-bounces at lists.denx.de [mailto:u-boot-bounces at lists.denx.de]
> On Behalf Of Shengzhou Liu
> Sent: Tuesday, July 01, 2014 11:32 AM
> To: u-boot at lists.denx.de; Sun York-R58495
> Subject: [U-Boot] [PATCH] powerpc/t1040: fix i2c2 address on t1040qds and
> t104xrdb
>
> The base address of I2C2 is 0x118100 instead of 0x119000.
>
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu at freescale.com>
> ---
> include/configs/T1040QDS.h | 2 +-
> include/configs/T104xRDB.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
> index 2215ac8..5b75562 100644
> --- a/include/configs/T1040QDS.h
> +++ b/include/configs/T1040QDS.h
> @@ -443,7 +443,7 @@ unsigned long get_board_ddr_clk(void);
> #define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
> #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
> #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
> -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000
> +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
>
> #define I2C_MUX_PCA_ADDR 0x77
> #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
> diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
> index e564cb7..e265786 100644
> --- a/include/configs/T104xRDB.h
> +++ b/include/configs/T104xRDB.h
> @@ -441,7 +441,7 @@
> #define CONFIG_SYS_FSL_I2C2_SPEED 400000 /* I2C speed in Hz */
> #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
> #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
> -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000
> +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
>
> /* I2C bus multiplexer */
> #define I2C_MUX_PCA_ADDR 0x70
> --
> 1.8.0
>
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