[U-Boot] [PATCH 0/6] usb: ci_udc: fixes and cleanups

Marek Vasut marex at denx.de
Wed Jul 2 00:51:15 CEST 2014


On Wednesday, July 02, 2014 at 12:42:40 AM, Jörg Krause wrote:
> On 07/01/2014 11:36 PM, Stephen Warren wrote:
> > [snip]
> > Can you please try one more thing:
> > 
> > Go back to u-boot-usb/master plus just your board support patches. Apply
> > 
> > the following and test that:
> >> diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
> >> index a6433e8d2d8d..13be1b73d3d1 100644
> >> --- a/drivers/usb/gadget/ci_udc.c
> >> +++ b/drivers/usb/gadget/ci_udc.c
> >> @@ -209,9 +209,9 @@ ci_ep_alloc_request(struct usb_ep *ep, unsigned int
> >> gfp_flags)
> >> 
> >>          ci_req = memalign(ARCH_DMA_MINALIGN, sizeof(*ci_req));
> >>          if (!ci_req)
> >>          
> >>                  return NULL;
> >> 
> >> +       memset(ci_req, 0, sizeof(*ci_req));
> >> 
> >>          INIT_LIST_HEAD(&ci_req->queue);
> >> 
> >> -       ci_req->b_buf = 0;
> >> 
> >>          if (num == 0)
> >>          
> >>                  controller.ep0_req = ci_req;
> > 
> > Thanks.
> 
> Applied and tested with printf in cache.c enabled. ttp runs more than
> three times in row without a timeout error.

It might really be worth if you ran git log --oneline and showed us exactly 
which patches were applied for each particular test. I am really getting lost 
sometimes ...

>     => reset
>     resetting ...
>     HTLLCLLC
> 
>     U-Boot 2014.07-rc3-g88eca85-dirty (Jul 02 2014 - 00:39:20)
> 
>     CPU:   Freescale i.MX28 rev1.2 at 454 MHz
>     BOOT:  NAND, 3V3
>     DRAM:  64 MiB
>     NAND:  128 MiB
>     In:    serial
>     Out:   serial
>     Err:   serial
>     Net:   usb_ether [PRIME]
>     Hit any key to stop autoboot:  0
>     => tftp imx28-airlino.dtb
>     using ci_udc, OUT ep- IN ep- STATUS ep-
>     MAC 00:19:b8:00:00:02
>     HOST MAC 00:19:b8:00:00:01
>     high speed config #1: 2 mA, Ethernet Gadget, using CDC Ethernet
>     USB network up!
>     Using usb_ether device
>     TFTP from server 10.0.0.1; our IP address is 10.0.0.2
>     Filename 'imx28-airlino.dtb'.
>     Load address: 0x40008000
>     Loading: ##
>           2.1 MiB/s
>     done
>     Bytes transferred = 18003 (4653 hex)
>     CACHE: Misaligned operation at range [40008000, 4000c653]

This is a bug somewhere.

>     =>
>     CACHE: Misaligned operation at range [43fd0b08, 43fd0b60]

This is a bug.

>     CACHE: Misaligned operation at range [43fd0b14, 43fd0b60]

This is a bug.

It would be nice to figure out where these unaligned accesses come from.


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