[U-Boot] SPL broken on i.mx31 platforms

[Helmut Raiger]

On 07/08/2014 02:32 PM, Helmut Raiger wrote:
> On 07/08/2014 10:05 AM, Helmut Raiger wrote:
>>
>> I meant, that the SPL is now doing the RAM init and copying of the 
>> SPL code
>> correctly. RAM is working, the SPL code is at 0x87dc0000 after that 
>> (CRCed it via JTAG).
>> I could not track it further (I have very limited development time 
>> right now ... repeating myself).
>>
>> After all I need to debug further. If someone could test the current 
>> state on the
>> mx31pdk, this still would be great. Just to rule out any other board 
>> specific issues.
>>
>> Helmut
>
> Ok, I've got some new input and I have no clue what's going on.
>
> 1) I fixed the first branch to reset (uses b reset instead of ldr pc, 
> _reset)
> 2) The startup does:
>
>   b reset
> ...
>
> reset:
>     - set the cpu to SVC32 mode
>     - bl  cpu_init_crit (cache and MMU stuff, calls low_level_init)
>     - bl _main
>
> low_level_init:
>    unlike in mx31pdk this only does:
>
>     ldr    r0, =ARM_PPMRR      /* start from AIPS 2GB region */
>     mcr    p15, 0, r0, c15, c2, 4
>     mov    pc, lr
>
> _main:
>     - set up stack pointer to internal SRAM
>     - bl board_init_f
>
> As I can't break right after reset with peedi, I do:
>
>   - reset stop
>   - set pc 0xb8000000
>   - go -> system never returns
>
> next:
>    reset stop
>    - set pc 0xb8000000
>    - break add hard 0xb80000c8        // set hardware breakpoint to 
> the 'bl board_init_f' instruction
>    - go
>     ... it stops at the breakpoint
>    - go
>     ... I'm at the u-boot command prompt
>
> If I set the breakpoint somewhere after the bl board_init_f it fails, 
> if I break a few instructions
> early and go from there it also fails. Tracking down the location 
> in-between I end up at:
>
> at the end of cpu_init_crit():
>
>     mov    ip, lr        /* persevere link reg across call */
>     bl    lowlevel_init    /* go setup pll,mux,memory */
> ->    mov    lr, ip        /* restore link */
>     mov    pc, lr        /* back to my caller */
>
> That is, if I set the breakpoint to mov lr, ip it works, if I set it 
> one instruction later it ends working.
>
> Could be struggling with the debugger here, as the SPL probably ran a 
> few instruction before it
> was stopped. Might this be a cache issue? But it is invalidated in 
> cpu_init_crit() anyway ...
>
> Feeling a little dumbstruck right now ...
>
> Sorry for the mess, but it's hard to describe.
>
> Any ideas?
> Helmut

Just putting 'to whom it may concern' in CC, don't know the rule here.
Helmut


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