[U-Boot] [PATCH 07/25] dm: sandbox: Add a SPI emulation uclass
Simon Glass
sjg at chromium.org
Tue Jul 15 02:56:14 CEST 2014
U-Boot includes a SPI emulation driver already but it is not explicit, and
is hidden in the SPI flash code.
Conceptually with sandbox's SPI implementation we have a layer which
creates SPI bus transitions and a layer which interprets them, currently
only for SPI flash. The latter is actually an emulation, and it should be
possible to add more than one emulation - not just SPI flash.
Add a SPI emulation uclass so that other emulations can be plugged in to
support different types of emulated devices on difference buses/chip
selects.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
drivers/spi/Makefile | 1 +
drivers/spi/spi-emul-uclass.c | 15 +++++++++++++++
include/dm/uclass-id.h | 1 +
include/spi.h | 30 ++++++++++++++++++++++++++++++
4 files changed, 47 insertions(+)
create mode 100644 drivers/spi/spi-emul-uclass.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d1f1dd0..a1de028 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -8,6 +8,7 @@
# There are many options which enable SPI, so make this library available
ifdef CONFIG_DM_SPI
obj-y += spi-uclass.o
+obj-$(CONFIG_SANDBOX) += spi-emul-uclass.o
else
obj-y += spi.o
endif
diff --git a/drivers/spi/spi-emul-uclass.c b/drivers/spi/spi-emul-uclass.c
new file mode 100644
index 0000000..b436a0e
--- /dev/null
+++ b/drivers/spi/spi-emul-uclass.c
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <spi.h>
+#include <spi_flash.h>
+
+UCLASS_DRIVER(spi_emul) = {
+ .id = UCLASS_SPI_EMUL,
+ .name = "spi_emul",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 8207483..dce405e 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -18,6 +18,7 @@ enum uclass_id {
UCLASS_TEST,
UCLASS_TEST_FDT,
UCLASS_TEST_BUS,
+ UCLASS_SPI_EMUL, /* sandbox SPI device emulator */
/* U-Boot uclasses start here */
UCLASS_GPIO, /* Bank of general-purpose I/O pins */
diff --git a/include/spi.h b/include/spi.h
index b5e9347..d00a60b 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -423,6 +423,35 @@ struct dm_spi_ops {
int (*set_mode)(struct udevice *device, uint mode);
};
+struct dm_spi_emul_ops {
+ /**
+ * SPI transfer
+ *
+ * This writes "bitlen" bits out the SPI MOSI port and simultaneously
+ * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI
+ * works. Here the device is a slave.
+ *
+ * The source of the outgoing bits is the "dout" parameter and the
+ * destination of the input bits is the "din" parameter. Note that
+ * "dout" and "din" can point to the same memory location, in which
+ * case the input data overwrites the output data (since both are
+ * buffered by temporary variables, this is OK).
+ *
+ * spi_xfer() interface:
+ * @slave: The SPI slave which will be sending/receiving the data.
+ * @bitlen: How many bits to write and read.
+ * @dout: Pointer to a string of bits sent to the device. The
+ * bits are held in a byte array and are sent MSB first.
+ * @din: Pointer to a string of bits that will be sent back to
+ * the master.
+ * @flags: A bitwise combination of SPI_XFER_* flags.
+ *
+ * Returns: 0 on success, not -1 on failure
+ */
+ int (*xfer)(struct udevice *device, unsigned int bitlen,
+ const void *dout, void *din, unsigned long flags);
+};
+
int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,
struct udevice **devp);
@@ -443,6 +472,7 @@ int sandbox_spi_get_emul(struct sandbox_state *state,
/* Access the serial operations for a device */
#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops)
+#define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops)
#endif /* CONFIG_DM_SPI */
#endif /* _SPI_H_ */
--
2.0.0.526.g5318336
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