[U-Boot] [PATCH] powerpc/t104xrdb: add deep sleep support

[Yuantian.Tang at freescale.com]

From: Tang Yuantian <Yuantian.Tang at freescale.com>

Added deep sleep support on T104xRDB platforms.
Support both SD/SPI boot and NOR boot.

Signed-off-by: Tang Yuantian <Yuantian.Tang at freescale.com>
---
 board/freescale/t104xrdb/spl.c      | 41 +++++++++++++++----------
 board/freescale/t104xrdb/t104xrdb.c | 60 +++++++++++++++++++++++++++++++++++--
 include/configs/T104xRDB.h          |  2 +-
 3 files changed, 85 insertions(+), 18 deletions(-)

diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index e394b12..5b39ffa 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -15,6 +15,30 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_FSL_DEEP_SLEEP
+bool is_warm_boot(void)
+{
+#define DCFG_CCSR_CRSTSR_WDRFR	(1 << 3)
+	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+	if (in_be32(&gur->scrtsr[0]) & DCFG_CCSR_CRSTSR_WDRFR)
+		return 1;
+
+	return 0;
+}
+
+void fsl_dp_mem_setup(void)
+{
+	void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
+
+	/* does not provide HW signals for power management */
+	clrbits_8(cpld_base + 0x17, 0x40);
+	/* Disable MCKE isolation */
+	gpio_set_value(2, 0);
+	udelay(1);
+}
+#endif
+
 phys_size_t get_effective_memsize(void)
 {
 	return CONFIG_SYS_L3_SIZE;
@@ -62,9 +86,9 @@ void board_init_f(ulong bootflag)
 	/* Update GD pointer */
 	gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
 
-#ifdef CONFIG_DEEP_SLEEP
+#ifdef CONFIG_FSL_DEEP_SLEEP
 	/* disable the console if boot from deep sleep */
-	if (in_be32(&gur->scrtsr[0]) & (1 << 3))
+	if (is_warm_boot())
 		gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
 #endif
 	/* compiler optimization barrier needed for GCC >= 3.4 */
@@ -132,16 +156,3 @@ void board_init_r(gd_t *gd, ulong dest_addr)
 	nand_boot();
 #endif
 }
-
-#ifdef CONFIG_DEEP_SLEEP
-void board_mem_sleep_setup(void)
-{
-	void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE;
-
-	/* does not provide HW signals for power management */
-	clrbits_8(cpld_base + 0x17, 0x40);
-	/* Disable MCKE isolation */
-	gpio_set_value(2, 0);
-	udelay(1);
-}
-#endif
diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c
index a5e5fff..8b41380 100644
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -106,8 +106,20 @@ void ft_board_setup(void *blob, bd_t *bd)
 #endif
 }
 
-#ifdef CONFIG_DEEP_SLEEP
-void board_mem_sleep_setup(void)
+#ifdef CONFIG_FSL_DEEP_SLEEP
+/* determine if it is a warm boot */
+bool is_warm_boot(void)
+{
+#define DCFG_CCSR_CRSTSR_WDRFR	(1 << 3)
+	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+	if (in_be32(&gur->scrtsr[0]) & DCFG_CCSR_CRSTSR_WDRFR)
+		return 1;
+
+	return 0;
+}
+
+void fsl_dp_mem_setup(void)
 {
 	/* does not provide HW signals for power management */
 	CPLD_WRITE(misc_ctl_status, (CPLD_READ(misc_ctl_status) & ~0x40));
@@ -115,4 +127,48 @@ void board_mem_sleep_setup(void)
 	gpio_set_value(2, 0);
 	udelay(1);
 }
+
+void fsl_dp_ddr_restore(void)
+{
+#define DDR_BUFF_LEN	128
+	volatile u64 *src, *dst;
+	int i;
+	struct ccsr_scfg *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
+
+	if (!is_warm_boot())
+		return;
+
+	/* get the address of ddr date from SPARECR3 */
+	src = (u64 *)in_be32(&scfg->sparecr[2]);
+	dst = (u64 *)CONFIG_SYS_SDRAM_BASE;
+
+	for (i = 0; i < DDR_BUFF_LEN / 8; i++)
+		*dst++ = *src++;
+}
+
+int fsl_dp_resume(void)
+{
+	u32 start_addr;
+	void (*kernel_resume)(void);
+	struct ccsr_scfg *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
+
+	if (!is_warm_boot())
+		return 0;
+
+	fsl_dp_ddr_restore();
+
+	l2cache_init();
+#if defined(CONFIG_RAMBOOT_PBL)
+	disable_cpc_sram();
+#endif
+	enable_cpc();
+
+	/* Get the entry address and jump to kernel */
+	start_addr = in_be32(&scfg->sparecr[1]);
+	debug("Entry address is 0x%08x\n", start_addr);
+	kernel_resume = (void (*)(void))start_addr;
+	kernel_resume();
+
+	return 0;
+}
 #endif
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 1f5d39e..62dbfc4 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -99,7 +99,7 @@
 #define CONFIG_MP			/* support multiple processors */
 
 /* support deep sleep */
-#define CONFIG_DEEP_SLEEP
+#define CONFIG_FSL_DEEP_SLEEP
 #define CONFIG_SILENT_CONSOLE
 
 #ifndef CONFIG_SYS_TEXT_BASE
-- 
2.1.0.27.g96db324