[U-Boot] [PATCH 3/3] powerpc/t102xrdb: add deep sleep support

Yuantian.Tang at freescale.com Yuantian.Tang at freescale.com
Fri Nov 7 10:06:21 CET 2014


From: Tang Yuantian <Yuantian.Tang at freescale.com>

Added deep sleep support on T102xRDB platforms.

Signed-off-by: Tang Yuantian <Yuantian.Tang at freescale.com>
---
 board/freescale/t102xrdb/t102xrdb.c | 66 +++++++++++++++++++++++++++++++++++++
 include/configs/T102xRDB.h          |  2 +-
 2 files changed, 67 insertions(+), 1 deletion(-)

diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index 8fb426e..7f8c3b0 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -149,3 +149,69 @@ void board_mem_sleep_setup(void)
 	udelay(1);
 }
 #endif
+
+#ifdef CONFIG_FSL_DEEP_SLEEP
+/* determine if it is a warm boot */
+bool is_warm_boot(void)
+{
+#define DCFG_CCSR_CRSTSR_WDRFR	(1 << 3)
+	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+	if (in_be32(&gur->scrtsr[0]) & DCFG_CCSR_CRSTSR_WDRFR)
+		return 1;
+
+	return 0;
+}
+
+void fsl_dp_mem_setup(void)
+{
+	/* does not provide HW signals for power management */
+	CPLD_WRITE(misc_ctl_status, (CPLD_READ(misc_ctl_status) & ~0x40));
+	/* Disable MCKE isolation */
+	gpio_set_value(2, 0);
+	udelay(1);
+}
+
+void fsl_dp_ddr_restore(void)
+{
+#define DDR_BUFF_LEN	128
+	volatile u64 *src, *dst;
+	int i;
+	struct ccsr_scfg *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
+
+	if (!is_warm_boot())
+		return;
+
+	/* get the address of ddr date from SPARECR3 */
+	src = (u64 *)in_be32(&scfg->sparecr[2]);
+	dst = (u64 *)CONFIG_SYS_SDRAM_BASE;
+	for (i = 0; i < DDR_BUFF_LEN / 8; i++)
+		*dst++ = *src++;
+}
+
+int fsl_dp_resume(void)
+{
+	u32 start_addr;
+	void (*kernel_resume)(void);
+	struct ccsr_scfg *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
+
+	if (!is_warm_boot())
+		return 0;
+
+	fsl_dp_ddr_restore();
+
+	l2cache_init();
+#if defined(CONFIG_RAMBOOT_PBL)
+	disable_cpc_sram();
+#endif
+	enable_cpc();
+
+	/* Get the entry address and jump to kernel */
+	start_addr = in_be32(&scfg->sparecr[1]);
+	debug("Entry address is 0x%08x\n", start_addr);
+	kernel_resume = (void (*)(void))start_addr;
+	kernel_resume();
+
+	return 0;
+}
+#endif
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index e575784..42a0240 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -35,7 +35,7 @@
 #define CONFIG_ENV_OVERWRITE
 
 /* support deep sleep */
-#define CONFIG_DEEP_SLEEP
+#define CONFIG_FSL_DEEP_SLEEP
 #define CONFIG_SILENT_CONSOLE
 
 #ifdef CONFIG_RAMBOOT_PBL
-- 
2.1.0.27.g96db324



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