[U-Boot] [PATCH 17/33] x86: Add ISA DMA implementation

Simon Glass sjg at chromium.org
Wed Nov 12 01:18:05 CET 2014


Add simple init for the ISA DMA settings.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/x86/include/asm/isa_dma.h | 14 +++++++++++
 arch/x86/lib/Makefile          |  1 +
 arch/x86/lib/isa_dma.c         | 56 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 71 insertions(+)
 create mode 100644 arch/x86/include/asm/isa_dma.h
 create mode 100644 arch/x86/lib/isa_dma.c

diff --git a/arch/x86/include/asm/isa_dma.h b/arch/x86/include/asm/isa_dma.h
new file mode 100644
index 0000000..69c6a84
--- /dev/null
+++ b/arch/x86/include/asm/isa_dma.h
@@ -0,0 +1,14 @@
+/*
+ * From Coreboot
+ * Copyright (C) 2014 Google, Inc
+ * Copyright (C) 2008-2009 coresystems GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef __ASM_ISA_DMA_H
+#define _ASM_ISA_DMA_H
+
+void isa_dma_init(void);
+
+#endif
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 2d75f9f..622ef08 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -11,6 +11,7 @@ obj-y	+= gcc.o
 obj-y += i8259.o
 obj-y	+= init_helpers.o
 obj-y	+= interrupts.o
+obj-y += isa_dma.o
 obj-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
 obj-$(CONFIG_SYS_PCAT_TIMER) += pcat_timer.o
 obj-$(CONFIG_PCI) += pci_type1.o
diff --git a/arch/x86/lib/isa_dma.c b/arch/x86/lib/isa_dma.c
new file mode 100644
index 0000000..36d6ee5
--- /dev/null
+++ b/arch/x86/lib/isa_dma.c
@@ -0,0 +1,56 @@
+/*
+ * From Coreboot
+ * Copyright (C) 2014 Google, Inc
+ * Copyright (C) 2008-2009 coresystems GmbH
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/isa_dma.h>
+
+/* DMA controller registers */
+#define DMA1_CMD_REG		0x08	/* command register (w) */
+#define DMA1_STAT_REG		0x08	/* status register (r) */
+#define DMA1_REQ_REG            0x09    /* request register (w) */
+#define DMA1_MASK_REG		0x0A	/* single-channel mask (w) */
+#define DMA1_MODE_REG		0x0B	/* mode register (w) */
+#define DMA1_CLEAR_FF_REG	0x0C	/* clear pointer flip-flop (w) */
+#define DMA1_TEMP_REG           0x0D    /* Temporary Register (r) */
+#define DMA1_RESET_REG		0x0D	/* Master Clear (w) */
+#define DMA1_CLR_MASK_REG       0x0E    /* Clear Mask */
+#define DMA1_MASK_ALL_REG       0x0F    /* all-channels mask (w) */
+
+#define DMA2_CMD_REG		0xD0	/* command register (w) */
+#define DMA2_STAT_REG		0xD0	/* status register (r) */
+#define DMA2_REQ_REG            0xD2    /* request register (w) */
+#define DMA2_MASK_REG		0xD4	/* single-channel mask (w) */
+#define DMA2_MODE_REG		0xD6	/* mode register (w) */
+#define DMA2_CLEAR_FF_REG	0xD8	/* clear pointer flip-flop (w) */
+#define DMA2_TEMP_REG           0xDA    /* Temporary Register (r) */
+#define DMA2_RESET_REG		0xDA	/* Master Clear (w) */
+#define DMA2_CLR_MASK_REG       0xDC    /* Clear Mask */
+#define DMA2_MASK_ALL_REG       0xDE    /* all-channels mask (w) */
+
+/* I/O to memory, no autoinit, increment, single mode */
+#define DMA_MODE_READ	0x44
+/* memory to I/O, no autoinit, increment, single mode */
+#define DMA_MODE_WRITE	0x48
+#define DMA_MODE_CASCADE 0xC0   /* pass thru DREQ->HRQ, DACK<-HLDA only */
+
+#define DMA_AUTOINIT	0x10
+
+void isa_dma_init(void)
+{
+	/*
+	 * slave at 0x00 - 0x0f
+	 * master at 0xc0 - 0xdf
+	 * 0x80 - 0x8f DMA page registers
+	 * DMA: 0x00, 0x02, 0x4, 0x06 base address for DMA channel
+	 */
+	outb(0, DMA1_RESET_REG);
+	outb(0, DMA2_RESET_REG);
+	outb(DMA_MODE_CASCADE, DMA2_MODE_REG);
+	outb(0, DMA2_MASK_REG);
+}
-- 
2.1.0.rc2.206.gedb03e5



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