[U-Boot] [RFC PATCH 11/12] dm: i2c: Add tests for I2C

[Simon Glass]

Add some basic tests to check that the system works as expected.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 test/dm/Makefile |   1 +
 test/dm/i2c.c    | 100 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 test/dm/test.dts |  17 ++++++++++
 3 files changed, 118 insertions(+)
 create mode 100644 test/dm/i2c.c

diff --git a/test/dm/Makefile b/test/dm/Makefile
index 75d3d41..612aa95 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -20,4 +20,5 @@ ifneq ($(CONFIG_SANDBOX),)
 obj-$(CONFIG_DM_GPIO) += gpio.o
 obj-$(CONFIG_DM_SPI) += spi.o
 obj-$(CONFIG_DM_SPI_FLASH) += sf.o
+obj-$(CONFIG_DM_I2C) += i2c.o
 endif
diff --git a/test/dm/i2c.c b/test/dm/i2c.c
new file mode 100644
index 0000000..d2ee19d
--- /dev/null
+++ b/test/dm/i2c.c
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2013 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <i2c.h>
+#include <dm/device-internal.h>
+#include <dm/test.h>
+#include <dm/uclass-internal.h>
+#include <dm/ut.h>
+#include <dm/util.h>
+#include <asm/state.h>
+
+static const int busnum;
+static const int chip = 0x2c;
+
+/* Test that we can find buses and chips */
+static int dm_test_i2c_find(struct dm_test_state *dms)
+{
+	struct udevice *bus;
+	const int no_chip = 0x10;
+
+	ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum,
+						       false, &bus));
+
+	/*
+	 * i2c_post_bind() will bind devices to chip selects. Check this then
+	 * remove the emulation and the slave device.
+	 */
+	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
+	ut_assertok(i2c_probe(bus, chip));
+	ut_asserteq(-ENODEV, i2c_probe(bus, no_chip));
+	ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));
+
+	return 0;
+}
+DM_TEST(dm_test_i2c_find, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+static int dm_test_i2c_read_write(struct dm_test_state *dms)
+{
+	struct udevice *bus, *dev;
+	uint8_t buf[5];
+
+	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
+	ut_assertok(i2c_get_chip(bus, chip, &dev));
+	ut_assertok(i2c_read(dev, 0, buf, 5));
+	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
+	ut_assertok(i2c_write(dev, 2, (uint8_t *)"AB", 2));
+	ut_assertok(i2c_read(dev, 0, buf, 5));
+	ut_assertok(memcmp(buf, "\0\0AB\0", sizeof(buf)));
+
+	return 0;
+}
+DM_TEST(dm_test_i2c_read_write, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+static int dm_test_i2c_speed(struct dm_test_state *dms)
+{
+	struct udevice *bus, *dev;
+	uint8_t buf[5];
+
+	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
+	ut_assertok(i2c_get_chip(bus, chip, &dev));
+	ut_assertok(i2c_set_bus_speed(bus, 100000));
+	ut_assertok(i2c_read(dev, 0, buf, 5));
+	ut_assertok(i2c_set_bus_speed(bus, 400000));
+	ut_asserteq(400000, i2c_get_bus_speed(bus));
+	ut_assertok(i2c_read(dev, 0, buf, 5));
+	ut_asserteq(-EINVAL, i2c_write(dev, 0, buf, 5));
+
+	return 0;
+}
+DM_TEST(dm_test_i2c_speed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+static int dm_test_i2c_addr_len(struct dm_test_state *dms)
+{
+	struct udevice *bus, *dev;
+	uint8_t buf[5];
+
+	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
+	ut_assertok(i2c_get_chip(bus, chip, &dev));
+	ut_assertok(i2c_set_addr_len(dev, 1));
+	ut_assertok(i2c_read(dev, 0, buf, 5));
+
+	/* The sandbox driver allows this setting, but then fails reads */
+	ut_assertok(i2c_set_addr_len(dev, 2));
+	ut_asserteq(-EINVAL, i2c_read(dev, 0, buf, 5));
+
+	/* This is not supported by the uclass */
+	ut_asserteq(-EINVAL, i2c_set_addr_len(dev, 4));
+
+	/* This is faulted by the sandbox driver */
+	ut_asserteq(-EINVAL, i2c_set_addr_len(dev, 3));
+
+	return 0;
+}
+DM_TEST(dm_test_i2c_addr_len, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
diff --git a/test/dm/test.dts b/test/dm/test.dts
index 1fba792..69991a3 100644
--- a/test/dm/test.dts
+++ b/test/dm/test.dts
@@ -93,6 +93,23 @@
 		num-gpios = <10>;
 	};
 
+	i2c at 0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		compatible = "sandbox,i2c";
+		clock-frequency = <100000>;
+		eeprom at 2c {
+			reg = <0x2c>;
+			compatible = "i2c-eeprom";
+			emul {
+				compatible = "sandbox,i2c-eeprom";
+				sandbox,filename = "i2c.bin";
+				sandbox,size = <128>;
+			};
+		};
+	};
+
 	spi at 0 {
 		#address-cells = <1>;
 		#size-cells = <0>;
-- 
2.1.0.rc2.206.gedb03e5