[U-Boot] [RFC PATCH 12/28] powerpc: remove jupiter support

Masahiro Yamada yamada.masahiro at socionext.com
Thu Aug 13 12:15:30 CEST 2015


This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
---

 arch/powerpc/cpu/mpc5xxx/Kconfig |   4 -
 board/jupiter/Kconfig            |   9 --
 board/jupiter/MAINTAINERS        |   6 -
 board/jupiter/Makefile           |   8 --
 board/jupiter/jupiter.c          | 292 ---------------------------------------
 configs/jupiter_defconfig        |   4 -
 include/configs/jupiter.h        | 282 -------------------------------------
 7 files changed, 605 deletions(-)
 delete mode 100644 board/jupiter/Kconfig
 delete mode 100644 board/jupiter/MAINTAINERS
 delete mode 100644 board/jupiter/Makefile
 delete mode 100644 board/jupiter/jupiter.c
 delete mode 100644 configs/jupiter_defconfig
 delete mode 100644 include/configs/jupiter.h

diff --git a/arch/powerpc/cpu/mpc5xxx/Kconfig b/arch/powerpc/cpu/mpc5xxx/Kconfig
index bbfc54f..c7b6892 100644
--- a/arch/powerpc/cpu/mpc5xxx/Kconfig
+++ b/arch/powerpc/cpu/mpc5xxx/Kconfig
@@ -18,9 +18,6 @@ config TARGET_A4M072
 config TARGET_CM5200
 	bool "Support cm5200"
 
-config TARGET_JUPITER
-	bool "Support jupiter"
-
 config TARGET_MOTIONPRO
 	bool "Support motionpro"
 
@@ -67,7 +64,6 @@ source "board/a4m072/Kconfig"
 source "board/cm5200/Kconfig"
 source "board/ifm/o2dnt2/Kconfig"
 source "board/intercontrol/digsy_mtc/Kconfig"
-source "board/jupiter/Kconfig"
 source "board/motionpro/Kconfig"
 source "board/munices/Kconfig"
 source "board/phytec/pcm030/Kconfig"
diff --git a/board/jupiter/Kconfig b/board/jupiter/Kconfig
deleted file mode 100644
index d71acbb..0000000
--- a/board/jupiter/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_JUPITER
-
-config SYS_BOARD
-	default "jupiter"
-
-config SYS_CONFIG_NAME
-	default "jupiter"
-
-endif
diff --git a/board/jupiter/MAINTAINERS b/board/jupiter/MAINTAINERS
deleted file mode 100644
index 5a79a61..0000000
--- a/board/jupiter/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-JUPITER BOARD
-M:	Heiko Schocher <hs at denx.de>
-S:	Maintained
-F:	board/jupiter/
-F:	include/configs/jupiter.h
-F:	configs/jupiter_defconfig
diff --git a/board/jupiter/Makefile b/board/jupiter/Makefile
deleted file mode 100644
index 4d3ef9e..0000000
--- a/board/jupiter/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2003-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	:= jupiter.o
diff --git a/board/jupiter/jupiter.c b/board/jupiter/jupiter.c
deleted file mode 100644
index 8856393..0000000
--- a/board/jupiter/jupiter.c
+++ /dev/null
@@ -1,292 +0,0 @@
-/*
- * (C) Copyright 2007
- * Heiko Schocher, DENX Software Engineering, hs at denx.de.
- *
- * (C) Copyright 2004
- * Mark Jonas, Freescale Semiconductor, mark.jonas at motorola.com.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc5xxx.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <libfdt.h>
-
-#define SDRAM_DDR	0
-#if 1
-/* Settings Icecube */
-#define SDRAM_MODE	0x00CD0000
-#define SDRAM_CONTROL	0x504F0000
-#define SDRAM_CONFIG1	0xD2322800
-#define SDRAM_CONFIG2	0x8AD70000
-#else
-/*Settings Jupiter UB 1.0.0 */
-#define SDRAM_MODE	0x008D0000
-#define SDRAM_CONTROL	0xD04F0000
-#define SDRAM_CONFIG1	0xf7277f00
-#define SDRAM_CONFIG2	0x88b70004
-#endif
-
-#ifndef CONFIG_SYS_RAMBOOT
-static void sdram_start (int hi_addr)
-{
-	long hi_addr_bit = hi_addr ? 0x01000000 : 0;
-
-	/* unlock mode register */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-#if SDRAM_DDR
-	/* set mode register: extended mode */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
-	__asm__ volatile ("sync");
-
-	/* set mode register: reset DLL */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
-	__asm__ volatile ("sync");
-#endif
-
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-	/* auto refresh */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
-	__asm__ volatile ("sync");
-
-	/* set mode register */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
-	__asm__ volatile ("sync");
-
-	/* normal operation */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
-	__asm__ volatile ("sync");
-}
-#endif
-
-/*
- * ATTENTION: Although partially referenced initdram does NOT make real use
- *            use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE
- *            is something else than 0x00000000.
- */
-
-phys_size_t initdram (int board_type)
-{
-	ulong dramsize = 0;
-	ulong dramsize2 = 0;
-	uint svr, pvr;
-
-#ifndef CONFIG_SYS_RAMBOOT
-	ulong test1, test2;
-
-	/* setup SDRAM chip selects */
-	*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
-	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
-	__asm__ volatile ("sync");
-
-	/* setup config registers */
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
-	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
-	__asm__ volatile ("sync");
-
-#if SDRAM_DDR
-	/* set tap delay */
-	*(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
-	__asm__ volatile ("sync");
-#endif
-
-	/* find RAM size using SDRAM CS0 only */
-	sdram_start(0);
-	test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	sdram_start(1);
-	test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000);
-	if (test1 > test2) {
-		sdram_start(0);
-		dramsize = test1;
-	} else {
-		dramsize = test2;
-	}
-
-	/* memory smaller than 1MB is impossible */
-	if (dramsize < (1 << 20)) {
-		dramsize = 0;
-	}
-
-	/* set SDRAM CS0 size according to the amount of RAM found */
-	if (dramsize > 0) {
-		*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
-	} else {
-		*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
-	}
-
-	/* let SDRAM CS1 start right after CS0 */
-	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */
-
-	/* find RAM size using SDRAM CS1 only */
-	if (!dramsize)
-		sdram_start(0);
-	test2 = test1 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
-	if (!dramsize) {
-		sdram_start(1);
-		test2 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000);
-	}
-	if (test1 > test2) {
-		sdram_start(0);
-		dramsize2 = test1;
-	} else {
-		dramsize2 = test2;
-	}
-
-	/* memory smaller than 1MB is impossible */
-	if (dramsize2 < (1 << 20)) {
-		dramsize2 = 0;
-	}
-
-	/* set SDRAM CS1 size according to the amount of RAM found */
-	if (dramsize2 > 0) {
-		*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize
-			| (0x13 + __builtin_ffs(dramsize2 >> 20) - 1);
-	} else {
-		*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
-	}
-
-#else /* CONFIG_SYS_RAMBOOT */
-
-	/* retrieve size of memory connected to SDRAM CS0 */
-	dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
-	if (dramsize >= 0x13) {
-		dramsize = (1 << (dramsize - 0x13)) << 20;
-	} else {
-		dramsize = 0;
-	}
-
-	/* retrieve size of memory connected to SDRAM CS1 */
-	dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
-	if (dramsize2 >= 0x13) {
-		dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
-	} else {
-		dramsize2 = 0;
-	}
-
-#endif /* CONFIG_SYS_RAMBOOT */
-
-	/*
-	 * On MPC5200B we need to set the special configuration delay in the
-	 * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM
-	 * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190:
-	 *
-	 * "The SDelay should be written to a value of 0x00000004. It is
-	 * required to account for changes caused by normal wafer processing
-	 * parameters."
-	 */
-	svr = get_svr();
-	pvr = get_pvr();
-	if ((SVR_MJREV(svr) >= 2) &&
-	    (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) {
-
-		*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
-		__asm__ volatile ("sync");
-	}
-
-	return dramsize + dramsize2;
-}
-
-int checkboard (void)
-{
-	puts ("Board: Sauter (Jupiter)\n");
-	return 0;
-}
-
-void flash_preinit(void)
-{
-	/*
-	 * Now, when we are in RAM, enable flash write
-	 * access for detection process.
-	 * Note that CS_BOOT cannot be cleared when
-	 * executing in flash.
-	 */
-	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-}
-
-int board_early_init_r (void)
-{
-	flash_preinit ();
-	return 0;
-}
-
-void flash_afterinit(ulong size)
-{
-	if (size == 0x1000000) { /* adjust mapping */
-		*(vu_long *)MPC5XXX_BOOTCS_START = *(vu_long *)MPC5XXX_CS0_START =
-			START_REG(CONFIG_SYS_BOOTCS_START | size);
-		*(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP =
-			STOP_REG(CONFIG_SYS_BOOTCS_START | size, size);
-	}
-	*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
-	*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
-}
-
-int update_flash_size (int flash_size)
-{
-	flash_afterinit (flash_size);
-	return 0;
-}
-
-int board_early_init_f (void)
-{
-	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-	return 0;
-}
-
-#ifdef	CONFIG_PCI
-static struct pci_controller hose;
-
-extern void pci_mpc5xxx_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
-	pci_mpc5xxx_init(&hose);
-}
-#endif
-
-#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
-
-void init_ide_reset (void)
-{
-	debug ("init_ide_reset\n");
-
-	/* Configure PSC1_4 as GPIO output for ATA reset */
-	*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
-	*(vu_long *) MPC5XXX_WU_GPIO_DIR    |= GPIO_PSC1_4;
-	/* Deassert reset */
-	*(vu_long *) MPC5XXX_WU_GPIO_DATA_O   |= GPIO_PSC1_4;
-}
-
-void ide_set_reset (int idereset)
-{
-	debug ("ide_reset(%d)\n", idereset);
-
-	if (idereset) {
-		*(vu_long *) MPC5XXX_WU_GPIO_DATA_O &= ~GPIO_PSC1_4;
-		/* Make a delay. MPC5200 spec says 25 usec min */
-		udelay(500000);
-	} else {
-		*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |=  GPIO_PSC1_4;
-	}
-}
-#endif
-
-#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup(blob, bd);
-
-	return 0;
-}
-#endif
diff --git a/configs/jupiter_defconfig b/configs/jupiter_defconfig
deleted file mode 100644
index a3c259f..0000000
--- a/configs/jupiter_defconfig
+++ /dev/null
@@ -1,4 +0,0 @@
-CONFIG_PPC=y
-CONFIG_MPC5xxx=y
-CONFIG_TARGET_JUPITER=y
-# CONFIG_CMD_SETEXPR is not set
diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h
deleted file mode 100644
index 65b3df6..0000000
--- a/include/configs/jupiter.h
+++ /dev/null
@@ -1,282 +0,0 @@
-/*
- * (C) Copyright 2007
- * Heiko Schocher, DENX Software Engineering, hs at denx.de.
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-
-#define CONFIG_MPC5200		1	/* This is an MPC5200 CPU */
-#define CONFIG_JUPITER		1	/* ... on Jupiter board */
-
-/*
- * Valid values for CONFIG_SYS_TEXT_BASE are:
- * 0xFFF00000	boot high (standard configuration)
- * 0x00100000	boot from RAM (for testing only)
- */
-#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xFFF00000
-#endif
-
-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz */
-
-#define CONFIG_BOARD_EARLY_INIT_R	1
-#define CONFIG_BOARD_EARLY_INIT_F	1
-
-#define CONFIG_HIGH_BATS	1	/* High BATs supported */
-
-/*
- * Serial console configuration
- */
-#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1 */
-#define CONFIG_BAUDRATE		115200	/* ... at 115200 bps */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/*
- * PCI Mapping:
- * 0x40000000 - 0x4fffffff - PCI Memory
- * 0x50000000 - 0x50ffffff - PCI IO Space
- */
-/*#define CONFIG_PCI		*/
-
-#if defined(CONFIG_PCI)
-#define CONFIG_PCI_PNP		1
-#define CONFIG_PCI_SCAN_SHOW	1
-#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	1
-
-#define CONFIG_PCI_MEM_BUS	0x40000000
-#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
-#define CONFIG_PCI_MEM_SIZE	0x10000000
-
-#define CONFIG_PCI_IO_BUS	0x50000000
-#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
-#define CONFIG_PCI_IO_SIZE	0x01000000
-#endif
-
-#define CONFIG_SYS_XLB_PIPELINING	1
-
-#define CONFIG_MII		1
-#define CONFIG_SYS_RX_ETH_BUFFER	8  /* use 8 rx buffer on eepro100  */
-
-/* Partitions */
-#define CONFIG_MAC_PARTITION
-#define CONFIG_DOS_PARTITION
-#define CONFIG_ISO_PARTITION
-
-#define	CONFIG_TIMESTAMP		/* Print image info with timestamp */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#define CONFIG_CMD_SNTP
-
-#if defined(CONFIG_PCI)
-#define CODFIG_CMD_PCI
-#endif
-
-
-/*
- * Autobooting
- */
-#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
-
-#define CONFIG_PREBOOT	"echo;"	\
-	"echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
-	"echo"
-
-#undef	CONFIG_BOOTARGS
-
-#define	CONFIG_EXTRA_ENV_SETTINGS					\
-	"netdev=eth0\0"							\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip=setenv bootargs ${bootargs} "				\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"flash_nfs=run nfsargs addip addcons;"				\
-		"bootm ${kernel_addr}\0"				\
-	"flash_self=run ramargs addip;"					\
-		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
-	"addcons=setenv bootargs ${bootargs} console=${contyp},"	\
-		"${baudrate}\0"						\
-	"contyp=ttyS0\0"						\
-	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;"	\
-		"bootm\0"						\
-	"rootpath=/opt/eldk/ppc_6xx\0"					\
-	"bootfile=/tftpboot/jupiter/uImage\0"				\
-	""
-
-#define CONFIG_BOOTCOMMAND	"run flash_self"
-
-/*
- * IPB Bus clocking configuration.
- */
-#undef CONFIG_SYS_IPBSPEED_133			/* define for 133MHz speed */
-
-#if 0
-/* pass open firmware flat tree */
-#define CONFIG_OF_LIBFDT	1
-#define CONFIG_OF_BOARD_SETUP	1
-
-#define OF_CPU			"PowerPC,5200 at 0"
-#define OF_SOC			"soc5200 at f0000000"
-#define OF_TBCLK		(bd->bi_busfreq / 8)
-#define OF_STDOUT_PATH		"/soc5200 at f0000000/serial at 2000"
-#endif
-
-#if 0
-/*
- * I2C configuration
- */
-#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
-#define CONFIG_SYS_I2C_MODULE		2	/* Select I2C module #1 or #2 */
-
-#define CONFIG_SYS_I2C_SPEED		100000 /* 100 kHz */
-#define CONFIG_SYS_I2C_SLAVE		0x7F
-
-/*
- * EEPROM configuration
- */
-#define CONFIG_SYS_I2C_EEPROM_ADDR		0x50	/* 1010000x */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	70
-#endif
-
-/*
- * Flash configuration
- */
-#define CONFIG_SYS_FLASH_BASE		0xFF000000
-#define CONFIG_SYS_FLASH_SIZE		0x01000000
-
-#define CONFIG_SYS_MAX_FLASH_SECT	128	/* max num of sects on one chip */
-
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
-#define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
-
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of flash banks */
-
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_8BIT
-#define CONFIG_SYS_UPDATE_FLASH_SIZE	1
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
-
-/*
- * Environment settings
- */
-#define CONFIG_ENV_IS_IN_FLASH	1
-#define CONFIG_ENV_SIZE		0x20000
-#define CONFIG_ENV_SECT_SIZE	0x20000
-#define CONFIG_ENV_OVERWRITE	1
-
-/* Address and size of Redundant Environment Sector	*/
-#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)
-
-/*
- * Memory map
- */
-#define CONFIG_SYS_MBAR		0xF0000000
-#define CONFIG_SYS_SDRAM_BASE		0x00000000
-#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
-
-/* Use SRAM until RAM will be available */
-#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE	/* Size of used area in DPRAM */
-
-
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#   define CONFIG_SYS_RAMBOOT		1
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN		(192 << 10)	/* Reserve 192 kB for Monitor	*/
-#define CONFIG_SYS_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
-#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
-
-/*
- * Ethernet configuration
- */
-#define CONFIG_MPC5xxx_FEC	1
-#define CONFIG_MPC5xxx_FEC_MII100
-/*
- * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
- */
-/* #define CONFIG_MPC5xxx_FEC_MII10 */
-#define CONFIG_PHY_ADDR		0x00
-
-/*
- * GPIO configuration
- */
-#define CONFIG_SYS_GPS_PORT_CONFIG	0x10000004
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP			/* undef to save memory	    */
-
-#define CONFIG_CMDLINE_EDITING	1	/* add command line history	*/
-#define CONFIG_SYS_HUSH_PARSER		1	/* Use the HUSH parser		*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size  */
-#else
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size  */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/
-
-#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
-#define CONFIG_SYS_ALT_MEMTEST		1
-
-#define CONFIG_SYS_LOAD_ADDR		0x200000	/* default load address */
-
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value */
-#endif
-
-/*
- * Various low-level settings
- */
-#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
-#define CONFIG_SYS_HID0_FINAL		HID0_ICE
-
-#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
-#define CONFIG_SYS_BOOTCS_CFG		0x00047801
-#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
-
-#define CONFIG_SYS_CS_BURST		0x00000000
-#define CONFIG_SYS_CS_DEADCYCLE	0x33333333
-
-#define CONFIG_SYS_RESET_ADDRESS	0xff000000
-
-#endif /* __CONFIG_H */
-- 
1.9.1



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