[U-Boot] [PATCH v2] arm/ls1021a: Add workaround for DDR erratum A008378

[Albert ARIBAUD]

Hello York Sun,

On Wed, 14 Jan 2015 12:46:07 -0800, York Sun <yorksun at freescale.com>
wrote:
> Internal memory controller counters can reach a bad state after
> training in DDR4 mode if accumulated ECC or DBI mode is eanbled.

typo: eanbled -> enabled.

Amicalement,
-- 
Albert.