[U-Boot] Pull-request: u-boot-spi/master
Simon Glass
sjg at chromium.org
Tue Sep 15 15:28:55 CEST 2015
Hi Jagan,
On 15 September 2015 at 02:13, Jagan Teki <jteki at openedev.com> wrote:
> Hi Tom,
>
> Zynq patches has SPL build dependency with Simon changes [1].
>
> Simon, Any plan to send a PR for your changes.
>
> [1] http://git.denx.de/?p=u-boot/u-boot-dm.git;a=shortlog;h=refs/heads/zynq-working
These are for the zynq maintainer I think. They are not assigned to me
in patchwork.
>
> thanks!
> Jagan.
>
> The following changes since commit 850f788709cef8f7d53d571aec3bfb73b14c5531:
>
> Merge branch 'rmobile' of git://git.denx.de/u-boot-sh (2015-09-13 17:25:16 -0400)
>
> are available in the git repository at:
>
>
> git://git.denx.de/u-boot-spi.git master
>
> for you to fetch changes up to a63981e1727139c51f05d3fa1cb1b299d2c00a7d:
>
> zynq-common: Add SPL SPI offset, size configs (2015-09-15 13:31:44 +0530)
>
> ----------------------------------------------------------------
> Jagan Teki (23):
> spi: Add zynq qspi controller driver
> dts: zynq: Add zynq qspi controller nodes
> doc: device-tree-bindings: spi: Add zynq qspi info
> dts: microzed: Enable zynq qspi controller node
> dts: zc702: Enable zynq qspi controller node
> dts: zc706: Enable zynq qspi controller node
> dts: zc770-xm010: Enable zynq qspi controller node
> dts: zed: Enable zynq qspi controller node
> configs: Enable legacy SPI flash interface support
> zynq-common: Enable zynq qspi controller support
> zynq-common: Enable Bank/Extended address register support
> configs: zynq: Enable zynq qspi controller
> spi: Kconfig: Add Zynq QSPI controller entry
> spi: zynq_spi: Add config reg shift named macros
> spi: zynq_spi: Rename baudrate divisor mask name
> spi: zynq_spi: Store cs value into private data
> sf: params: Add IS25LP032 part support
> sf: params: Add IS25LP064 part support
> sf: params: Add IS25LP128 part support
> zynq-common: Enable ISSI SPI-NOR flash support
> spi: xilinx_spi: Fix to configure CPOL, CPHA mask
> spi: zynq_spi: Fix to configure CPOL, CPHA mask
> spi: zynq_qspi: Fix to configure CPOL, CPHA mask
>
> Mirza Krak (1):
> spi: tegra20: Add support for mode selection
>
> Siva Durga Prasad Paladugu (1):
> zynq-common: Add SPL SPI offset, size configs
>
> arch/arm/dts/zynq-7000.dtsi | 12 +
> arch/arm/dts/zynq-microzed.dts | 5 +
> arch/arm/dts/zynq-zc702.dts | 5 +
> arch/arm/dts/zynq-zc706.dts | 5 +
> arch/arm/dts/zynq-zc770-xm010.dts | 7 +-
> arch/arm/dts/zynq-zed.dts | 5 +
> configs/zynq_microzed_defconfig | 2 +
> configs/zynq_zc702_defconfig | 2 +
> configs/zynq_zc706_defconfig | 2 +
> configs/zynq_zc70x_defconfig | 2 +
> configs/zynq_zc770_xm010_defconfig | 1 +
> configs/zynq_zed_defconfig | 2 +
> doc/device-tree-bindings/spi/spi-zynq-qspi.txt | 26 ++
> drivers/mtd/spi/sf_params.c | 5 +
> drivers/spi/Kconfig | 9 +
> drivers/spi/Makefile | 1 +
> drivers/spi/tegra20_slink.c | 21 +
> drivers/spi/xilinx_spi.c | 10 +-
> drivers/spi/zynq_qspi.c | 623 +++++++++++++++++++++++++
> drivers/spi/zynq_spi.c | 27 +-
> include/configs/zynq-common.h | 15 +
> 21 files changed, 771 insertions(+), 16 deletions(-)
> create mode 100644 doc/device-tree-bindings/spi/spi-zynq-qspi.txt
> create mode 100644 drivers/spi/zynq_qspi.c
Regards,
Simon
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