[U-Boot] [PATCH 02/10] ddr: altera: Tweak DQS tracking enable handling

[George Broz]

On 6 April 2016 at 19:03, Marek Vasut <marex at denx.de> wrote:
> In the most unlikely case the DQS tracking was to be disabled,
> make sure we do not errornously re-enable it. Note that DQS
> tracking is enabled on all systems observed thus far.
>
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Dinh Nguyen <dinguyen at opensource.altera.com>
> Cc: Chin Liang See <clsee at altera.com>
> ---
>  drivers/ddr/altera/sequencer.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
> index 34b1aa7..bf74b4e 100644
> --- a/drivers/ddr/altera/sequencer.c
> +++ b/drivers/ddr/altera/sequencer.c
> @@ -3479,6 +3479,7 @@ grp_failed:               /* A group failed, increment the counter. */
>  static int run_mem_calibrate(void)
>  {
>         int pass;
> +       u32 ctrl_cfg;
>
>         debug("%s:%d\n", __func__, __LINE__);
>
> @@ -3486,7 +3487,9 @@ static int run_mem_calibrate(void)
>         writel(PHY_MGR_CAL_RESET, &phy_mgr_cfg->cal_status);
>
>         /* Stop tracking manager. */
> -       clrbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK);
> +       ctrl_cfg = readl(&sdr_ctrl->ctrl_cfg);
> +       writel(ctrl_cfg & ~SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK,
> +              &sdr_ctrl->ctrl_cfg);
>
>         phy_mgr_initialize();
>         rw_mgr_mem_initialize();
> @@ -3507,7 +3510,7 @@ static int run_mem_calibrate(void)
>         writel(0x2, &phy_mgr_cfg->mux_sel);
>
>         /* Start tracking manager. */
> -       setbits_le32(&sdr_ctrl->ctrl_cfg, SDR_CTRLGRP_CTRLCFG_DQSTRKEN_MASK);
> +       writel(ctrl_cfg, &sdr_ctrl->ctrl_cfg);
>
>         return pass;
>  }
> --
> 2.7.0
>

Tested on: SoCKit, DE0_Nano_SoC
Tested-by: George Broz <brozgeo at gmail.com>