[U-Boot] [PATCH] board: ti: am57xx: Update EMIF SDRAM 1 and 3 Timings

[Lokesh Vutla]

On Saturday 09 April 2016 03:23 AM, Nishanth Menon wrote:
> From: Schuyler Patton <spatton at ti.com>
> 
> Update EMIF data based on recommendations from the now standard TI
> EMIF tool version 1.1.1 based on 256MBx16 DDR3L Kingston D2516EC4BXGGB
> data sheet
> 
> Update T_RRD from 5 to 6 based on AM57xx TRM -
> Minimum number of DDR cycles from activate to ativate for a different
> bank, minus 1.
> 
> Update T_CKESR from 4 to 3 based on AM57xx TRM - Minimum number of DDR
> clocks cycles for which SDRAM must remain in self refresh, minus 1.

Reviewed-by: Lokesh Vutla <lokeshvutla at ti.com>

Thanks and regards,
Lokesh