[U-Boot] [PATCH] board: ti: am57xx: Update EMIF SDRAM 1 and 3 Timings

[Tom Rini]

On Fri, Apr 08, 2016 at 04:53:44PM -0500, Nishanth Menon wrote:

> From: Schuyler Patton <spatton at ti.com>
> 
> Update EMIF data based on recommendations from the now standard TI
> EMIF tool version 1.1.1 based on 256MBx16 DDR3L Kingston D2516EC4BXGGB
> data sheet
> 
> Update T_RRD from 5 to 6 based on AM57xx TRM -
> Minimum number of DDR cycles from activate to ativate for a different
> bank, minus 1.
> 
> Update T_CKESR from 4 to 3 based on AM57xx TRM - Minimum number of DDR
> clocks cycles for which SDRAM must remain in self refresh, minus 1.
> 
> Signed-off-by: Schuyler Patton <spatton at ti.com>
> Signed-off-by: Nishanth Menon <nm at ti.com>

Reviewed-by: Tom Rini <trini at konsulko.com>

-- 
Tom
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