[U-Boot] [PATCH v2] arm: cache: always flush cache line size for page table
Fabio Estevam
festevam at gmail.com
Fri Aug 5 03:31:33 CEST 2016
Hi Stefan,
On Thu, Aug 4, 2016 at 2:41 AM, Stefan Agner <stefan at agner.ch> wrote:
> - mmu_page_table_flush((u32)&page_table[start], (u32)&page_table[end]);
> +
> + /*
> + * Make sure range is cache line aligned
> + * Only CPU maintains page tables, hence it is save to always
s/save/safe
This fixes the cache warnings on a mx7dsabresd, thanks:
Tested-by: Fabio Estevam <fabio.estevam at nxp.com>
More information about the U-Boot
mailing list