[U-Boot] [PATCH] mx6ul_14x14_evk: Fix DDR calibration values

[Fabio Estevam]

Hi Eric,

On Mon, Aug 29, 2016 at 12:20 AM, Fabio Estevam <festevam at gmail.com> wrote:
> From: Fabio Estevam <fabio.estevam at nxp.com>
>
> When running NXP 4.1 kernel with U-Boot mainline we observe a
> hang when going into the lowest operational point of cpufreq.
>
> Comparing the DDR calibration values against NXP U-Boot showed
> that the values were incorrect.
>
> Adjust the calibration values so that we can avoid such system hang.
>
> Reported-by: Eric Nelson <eric at nelint.com>
> Signed-off-by: Fabio Estevam <fabio.estevam at nxp.com>

After running more tests I still get the hang sometimes, so we still
need to review the DDR SPL settings.

Regards,

Fabio Estevam