[U-Boot] [PATCH v3 1/4] mx6: ddr: Allow changing REFSEL and REFR fields

[Eric Nelson]

On 08/29/2016 01:59 PM, Fabio Estevam wrote:
> Hi Eric,
> 
> On Mon, Aug 29, 2016 at 5:56 PM, Eric Nelson <eric at nelint.com> wrote:
> 
>>>       /* Step 12: Configure and activate periodic refresh */
>>> -     mmdc0->mdref = (1 << 14) | /* REF_SEL: Periodic refresh cycle: 32kHz */
>>> -                    (7 << 11);  /* REFR: Refresh Rate - 8 refreshes */
>>
>> Oops.
>>
>> Your original patch (and what we want for the 6UL EVK) has a refsel
>> of zero, right?
>>         http://lists.denx.de/pipermail/u-boot/2016-August/265128.html
> 
> Yes, in this v3 series I change refsel to 0 in patch 2/4.
> 

Right, but this patch will change it back to a 1:

+	if (!sysinfo->refsel)
+		refsel = 1; /* REF_SEL: Periodic refresh cycle: 32kHz */
+	else
+		refsel = sysinfo->refsel;