[U-Boot] [PATCH v2] Revert "sf: Fix quad bit set for micron devices"

Jagan Teki jagan at openedev.com
Fri Dec 16 23:15:32 CET 2016


On Thu, Dec 15, 2016 at 6:35 PM, Jagan Teki <jagan at openedev.com> wrote:
> From: Cyrille Pitchen <cyrille.pitchen at atmel.com>
>
> This reverts commit c56ae7519f141523ba1248b22b5b5169b21772fe.
>
> Once the 'Quad Enable' bit is cleared in their Enhanced Volatile
> Configuration Register (EVCR), Micron memories expect ALL commands to use
> the SPI 4-4-4 protocol. Commands using SPI 1-y-z protocols are no longer
> accepted.
>
> Within the reverted commit, the write_evcr() function is implemented using
> the spi_flash_write_common(), which is a shortcut for the
> [ spi_flash_cmd_write_enable(), spi_flash_cmd_write(),
> spi_flash_cmd_wait_ready() ] sequence.
>
> Since the internal state of the Micron memory has been changed when the
> spi_flash_cmd_write() function completes, the later call of the
> spi_flash_cmd_wait_ready() function fails.
>
> Indeed the SPI controller driver is not aware of the SPI protocol switch.
>
> Further patches will fix the support of Micron QSPI memories.
>
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen at atmel.com>
> [Rebase on master, use JEDEC_MFR(info) in place of idcode0]
> Signed-off-by: Jagan Teki <jagan at openedev.com>

Applied to u-boot-spi/master

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.


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