[U-Boot] [PATCH] mpc85xx: pci: Implement workaround for Erratum A007815
Mingkai Hu
mingkai.hu at nxp.com
Thu Dec 22 17:37:57 CET 2016
> -----Original Message-----
> From: york sun
> Sent: Friday, December 02, 2016 1:24 AM
> To: Mingkai Hu <mingkai.hu at nxp.com>
> Cc: Chris Packham <judge.packham at gmail.com>; Tony O'Brien
> <tony.obrien at alliedtelesis.co.nz>; u-boot <u-boot at lists.denx.de>
> Subject: Re: [U-Boot] [PATCH] mpc85xx: pci: Implement workaround for
> Erratum A007815
>
> On 11/30/2016 11:51 PM, Chris Packham wrote:
> > (adding York)
> >
> > On Thu, Dec 1, 2016 at 4:20 PM, Tony O'Brien
> > <tony.obrien at alliedtelesis.co.nz> wrote:
> >> The read-only-write-enable bit is set by default and must be cleared
> >> to prevent overwriting read-only registers. This should be done
> >> immediately after resetting the PCI Express controller.
> >>
> >> Reviewed-by: Hamish Martin <hamish.martin at alliedtelesis.co.nz>
> >>
> >> ---
> >> Note that this does not implement the whole fix for this erratum,
> >> just what is necessary for our implementation. Since we are using a
> >> fixed RC configuration, no support has been added for EP mode or any
> >> consideration of link-up/down events.
> >>
> >> Signed-off-by: Tony O'Brien <tony.obrien at alliedtelesis.co.nz>
> >> ---
> >> arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 +++
> >> arch/powerpc/include/asm/config_mpc85xx.h | 1 +
> >> arch/powerpc/include/asm/fsl_pci.h | 4 +++-
> >> drivers/pci/fsl_pci_init.c | 7 +++++++
> >> 4 files changed, 14 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> >> b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> >> index 402a1ff..aabb56b 100644
> >> --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> >> +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
> >> @@ -330,6 +330,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag,
> >> int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_A009663
> >> puts("Work-around for Erratum A009663 enabled\n"); #endif
> >> +#ifdef CONFIG_SYS_FSL_ERRATUM_A007815
> >> + puts("Work-around for Erratum A007815 enabled\n"); #endif
> >>
> >> return 0;
> >> }
> >> diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
> >> b/arch/powerpc/include/asm/config_mpc85xx.h
> >> index c92bc1e..c298e44 100644
> >> --- a/arch/powerpc/include/asm/config_mpc85xx.h
> >> +++ b/arch/powerpc/include/asm/config_mpc85xx.h
> >> @@ -785,6 +785,7 @@ defined(CONFIG_PPC_T1014) ||
> >> defined(CONFIG_PPC_T1013) #define
> CONFIG_SYS_FSL_ERRATUM_A006593
> >> #define CONFIG_SYS_FSL_ERRATUM_A007186 #define
> >> CONFIG_SYS_FSL_ERRATUM_A006379
> >> +#define CONFIG_SYS_FSL_ERRATUM_A007815
> >> #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define
> >> CONFIG_SYS_FSL_SFP_VER_3_0
> >>
>
> Tony,
>
> The signed-off signature should be above the --- line.
>
> Mingkai,
>
> Please review this implementation. This erratum applies to T4240, T2080,
> LS1021A.
>
Hi York and Tony,
Sorry for delayed response.
I think it's better to add the errata implementation for the layerscape platform also.
The layerscape driver code is drivers/pci/pcie_layerscape.c. We can help to test the patch on the layerscape platform if Tony don't have the platform.
There is no link-up/down events used under u-boot, we can leave it out.
Thanks,
Mingkai
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