[U-Boot] [PATCH v2 08/18] usb: ehci-ci: Add missing registers.

[Mateusz Kulikowski]

Some registers of usb_ehci were marked as reserved.
This may be true for some variants of Chipidea USB core, but they have
meaning on other devices.

The following registers were added:
sbusstatus/sbusmode: AHB-related registers
genconfig*: Auxiluary IP core configuration registers.

Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski at gmail.com>
Reviewed-by: Marek Vasut <marex at denx.de>
Tested-by: Simon Glass <sjg at chromium.org>

---

Changes in v3: None
Changes in v2:
- Add reviewed-by

Changes in v1: None

 include/usb/ehci-ci.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 725aec5..305b180 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -191,7 +191,11 @@ struct usb_ehci {
 	u32     gptimer1_ld;	/* 0x088 - General Purpose Timer 1 load value */
 	u32     gptimer1_ctrl;	/* 0x08C - General Purpose Timer 1 control */
 	u32	sbuscfg;	/* 0x090 - System Bus Interface Control */
-	u8	res2[0x6C];
+	u32	sbusstatus;	/* 0x094 - System Bus Interface Status */
+	u32	sbusmode;	/* 0x098 - System Bus Interface Mode */
+	u32	genconfig;	/* 0x09C - USB Core Configuration */
+	u32	genconfig2;	/* 0x0A0 - USB Core Configuration 2 */
+	u8	res2[0x5c];
 	u8	caplength;	/* 0x100 - Capability Register Length */
 	u8	res3[0x1];
 	u16	hciversion;	/* 0x102 - Host Interface Version */
-- 
2.5.0