[U-Boot] [PATCH] powerpc/mpc85xx: Fix SPL_BUILD compilation by adding CONFIG_USB_EHCI_FSL flag

Tue Jul 5 13:55:25 CEST 2016

On 07/05/2016 05:38 AM, Sriram Dash wrote:
>> From: Marek Vasut [mailto:marex at denx.de]
>> On 07/04/2016 01:11 PM, Sriram Dash wrote:
>>> Commit 9262367 moved USB errata workaround to a C file but didn't
>>> build it for SPL targets. The EHCI errata should be applied/checked
>>> only when EHCI is defined.
>>>
>>> Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com>
>>> Signed-off-by: Sriram Dash <sriram.dash at nxp.com>
>>> ---
>>>  arch/powerpc/include/asm/config_mpc85xx.h | 32
>>> +++++++++++++++++++++++++++++--
>>
>> So why don't you fix arch/powerpc/cpu/mpc85xx/cmd_errata.c instead of adding
>> zillion ifdefs into the config_mpc85xx.h ?
>>
>
> Hello Marek,
>
> The phy errata is applied at cpu init time for some boards. Due to this, the code
> has been added in the file arch/powerpc/cpu/mpc85xx/cpu_init.c also. Now, this
> file is also required for SPL build. Hence, rather than fixing in every file

Which files are those exactly ? I suspect most of the erratas are used 
in cmd_errata.c only and maybe in ehci-fsl.c

> currently
> and the future implementations, I am thinking of fixing this at a common place.
>
>>>  include/configs/km/kmp204x-common.h       |  1 +
>>>  2 files changed, 31 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
>>> b/arch/powerpc/include/asm/config_mpc85xx.h
>>> index 505d355..c5fe3cf 100644
>>> --- a/arch/powerpc/include/asm/config_mpc85xx.h
>>> +++ b/arch/powerpc/include/asm/config_mpc85xx.h
>>> @@ -161,9 +161,11 @@
>>>  #define CONFIG_SYS_FSL_ERRATUM_A005125  #define
>>> CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004508
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A007075  #define
>>> CONFIG_SYS_FSL_ERRATUM_A006261  #define
>> CONFIG_SYS_FSL_ERRATUM_A004477
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_FSL_A004447_SVR_REV	0x10
>>>  #define CONFIG_ESDHC_HC_BLK_ADDR
>>>
>>> @@ -295,7 +297,9 @@
>>>  #define CONFIG_FSL_SATA_ERRATUM_A001
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004508  #define
>>> CONFIG_SYS_FSL_ERRATUM_A005125
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004477
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>
>>>  #elif defined(CONFIG_P1023)
>>>  #define CONFIG_MAX_CPUS			2
>>> @@ -376,7 +380,9 @@
>>>  #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM	2
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004508  #define
>>> CONFIG_SYS_FSL_ERRATUM_A005125
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004477
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
>>>
>>>  #elif defined(CONFIG_PPC_P2041) /* also supports P2040 */ @@ -414,7
>>> +420,9 @@  #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004849  #define
>>> CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A006261
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_FSL_A004447_SVR_REV	0x11
>>>
>>>  #elif defined(CONFIG_PPC_P3041)
>>> @@ -454,7 +462,9 @@
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004849  #define
>>> CONFIG_SYS_FSL_ERRATUM_A005812  #define
>>> CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A006261
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_FSL_A004447_SVR_REV	0x20
>>>
>>>  #elif defined(CONFIG_PPC_P4080) /* also supports P4040 */ @@ -505,7
>>> +515,9 @@  #define CONFIG_SYS_P4080_ERRATUM_PCIE_A003
>>>  #define CONFIG_SYS_FSL_ERRATUM_A005812  #define
>>> CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A007075
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_FSL_A004447_SVR_REV	0x20
>>>
>>>  #elif defined(CONFIG_PPC_P5020) /* also supports P5010 */ @@ -541,7
>>> +553,9 @@  #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
>> 0xc0000000
>>> #define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
>>>  #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A006261
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_FSL_A004447_SVR_REV	0x20
>>>
>>>  #elif defined(CONFIG_PPC_P5040)
>>> @@ -574,7 +588,9 @@
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004699  #define
>>> CONFIG_SYS_FSL_ERRATUM_A004510
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV	0x10
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A006261
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
>> #define
>>> CONFIG_SYS_FSL_ERRATUM_A005812
>>>
>>> @@ -594,7 +610,9 @@
>>>  #define CONFIG_NAND_FSL_IFC
>>>  #define CONFIG_SYS_FSL_ERRATUM_ESDHC111  #define
>>> CONFIG_SYS_FSL_ERRATUM_A005125
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004477
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_ESDHC_HC_BLK_ADDR
>>>
>>>  #elif defined(CONFIG_BSC9132)
>>> @@ -619,7 +637,9 @@
>>>  #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.2"
>>>  #define CONFIG_SYS_FSL_ERRATUM_A005125  #define
>>> CONFIG_SYS_FSL_ERRATUM_A005434
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004477
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
>>>  #define CONFIG_SYS_FSL_A004447_SVR_REV	0x11
>>>  #define CONFIG_ESDHC_HC_BLK_ADDR
>>> @@ -681,11 +701,13 @@
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004468  #define
>>> CONFIG_SYS_FSL_ERRATUM_A_004934  #define
>>> CONFIG_SYS_FSL_ERRATUM_A005871 -#define
>> CONFIG_SYS_FSL_ERRATUM_A006261
>>> #define CONFIG_SYS_FSL_ERRATUM_A006379  #define
>>> CONFIG_SYS_FSL_ERRATUM_A007186  #define
>> CONFIG_SYS_FSL_ERRATUM_A006593
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>> +#define CONFIG_SYS_FSL_ERRATUM_A006261
>>>  #define CONFIG_SYS_FSL_ERRATUM_A007798
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000
>>>  #define CONFIG_SYS_FSL_SFP_VER_3_0
>>>  #define CONFIG_SYS_FSL_PCI_VER_3_X
>>> @@ -724,11 +746,13 @@
>>>  #define CONFIG_SYS_FSL_ERRATUM_A006379  #define
>>> CONFIG_SYS_FSL_ERRATUM_A007186  #define
>> CONFIG_SYS_FSL_ERRATUM_A006593
>>> -#define CONFIG_SYS_FSL_ERRATUM_A007075  #define
>>> CONFIG_SYS_FSL_ERRATUM_A006475  #define
>> CONFIG_SYS_FSL_ERRATUM_A006384
>>> #define CONFIG_SYS_FSL_ERRATUM_A007212
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>> +#define CONFIG_SYS_FSL_ERRATUM_A007075
>>>  #define CONFIG_SYS_FSL_ERRATUM_A004477
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000
>>>  #define CONFIG_SYS_FSL_SFP_VER_3_0
>>>
>>> @@ -799,7 +823,9 @@ defined(CONFIG_PPC_T1020) ||
>> defined(CONFIG_PPC_T1022)
>>>  #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.4"
>>>  #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
>>>  #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A006261
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000
>>>  #define CONFIG_SYS_FSL_ERRATUM_ESDHC111  #define
>>> ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE @@ -907,7 +933,9 @@
>>> defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)  #define
>>> CONFIG_SYS_FSL_SFP_VER_3_0
>>>  #define CONFIG_SYS_FSL_ISBC_VER		2
>>>  #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
>>> +#ifdef CONFIG_USB_EHCI_FSL
>>>  #define CONFIG_SYS_FSL_ERRATUM_A006261
>>> +#endif /* CONFIG_USB_EHCI_FSL */
>>>  #define CONFIG_SYS_FSL_ERRATUM_A006593  #define
>>> CONFIG_SYS_FSL_ERRATUM_A007186  #define
>> CONFIG_SYS_FSL_ERRATUM_A006379
>>> diff --git a/include/configs/km/kmp204x-common.h
>>> b/include/configs/km/kmp204x-common.h
>>> index 028623d..5bdda22 100644
>>> --- a/include/configs/km/kmp204x-common.h
>>> +++ b/include/configs/km/kmp204x-common.h
>>> @@ -406,6 +406,7 @@ int get_scl(void);  #endif
>>>
>>>  #define __USB_PHY_TYPE	utmi
>>> +#define CONFIG_USB_EHCI_FSL
>>>
>>>  /*
>>>   * Environment Configuration
>>>
>>
>>
>> --
>> Best regards,
>> Marek Vasut
>
> Regards,
> Sriram
>

-- 
Best regards,
Marek Vasut