[U-Boot] [PATCH] Trimslice config: update for Trimslice so SPI flash works

[Stephen Warren]

On 07/25/2016 01:02 PM, Stephen Arnold wrote:
> From: Steve Arnold <stephen.arnold42 at gmail.com>
>
> This updates the defaults for trimslice so it matches the last vendor
> config.  Use the tegra-uboot-flasher tools to create mmc and spi flash
> images and flash to the device. Can optionally replace boot.scr with
> extlinux.conf configuration. Tested on Trimslice Diskless (with SSD).

There should be no need for any of the values to be specific to 
Trimslice. What issues does this patch attempt to solve? Note: I'm 
looking for a specific debugged problem, not a generic "it doesn't work" 
explanation. To work out what's wrong, you likely need to connect to the 
serial port on Trimslice and view its output. At least my Trimslice came 
with the required cable for this, assuming you have a regular RS-232 
level DB-9/DE-9 UART on some other PC to connect it to.

> diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h

> +#ifndef CONFIG_TARGET_TRIMSLICE
>  #define CONFIG_SYS_TEXT_BASE	0x00110000
> +#endif

I can't think why you'd need to change this; it's a value that's 
internal to U-Boot, and the only reason to change it would be if the 
delta between CONFIG_SPL_TEXT_BASE and this value isn't large enough to 
fit SPL text+data+bss. If that's the case, this value should be changed 
for all Tegra20 boards, perhaps even all Tegra SoCs.

> +#ifndef CONFIG_TARGET_TRIMSLICE
>  #define CONFIG_LOADADDR 0x01000000
>  #define MEM_LAYOUT_ENV_SETTINGS \
>  	"scriptaddr=0x10000000\0" \
> @@ -65,6 +68,7 @@
>  	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
>  	"fdt_addr_r=0x02000000\0" \
>  	"ramdisk_addr_r=0x02100000\0"
> +#endif

Those values should work just fine for Trimslice; again they're entirely 
internal to U-Boot and simply control where U-Boot loads various images 
into RAM. Everything U-Boot loads (kernel, DTB, initrd) can be loaded at 
a variety of addresses without issue, so there's no need for these 
values to exactly match the original U-Boot that Compulab published.

> +#ifndef CONFIG_TARGET_TRIMSLICE
>  #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
> +#endif

I believe this controls the number of ports within a USB controller, not 
the number of USB controllers. If so, the correct number is 1 for all 
Tegra SoCs, and the value isn't board-specific.