[U-Boot] [PATCH 06/12] armv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot

[Prabhakar Kushwaha]

> -----Original Message-----
> From: Yuan Yao [mailto:yao.yuan at freescale.com]
> Sent: Wednesday, March 02, 2016 4:02 PM
> To: york sun <york.sun at nxp.com>
> Cc: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>;
> pratiyush.srivastava at freescale.com; u-boot at lists.denx.de; Yunhui Cui
> <yunhui.cui at nxp.com>; Yao Yuan <yao.yuan at nxp.com>
> Subject: [PATCH 06/12] armv8: ls2080aqds: Config QSPI pin mux via FPGA in
> NAND boot
> 
> From: Yuan Yao <yao.yuan at nxp.com>
> 
> If we want to access QSPI flash when boot from NAND, we need below
> board configuration:
> Boot Source             ISO1    ISO2    IBOOT
> On-board NAND   1       0       0
> IFCCARD NAND    0       0       1
> 
> Signed-off-by: Yuan Yao <yao.yuan at nxp.com>
> ---
>  arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 2 ++
>  board/freescale/ls2080aqds/ls2080aqds.c                | 9 +++++++++
>  include/configs/ls2080aqds.h                           | 6 ++++++
>  3 files changed, 17 insertions(+)
> 
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> index e5acae8..828a53b 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
> @@ -94,6 +94,8 @@
>  #define DCFG_PORSR1_RCW_SRC_NOR		0x12f00000
>  #define DCFG_RCWSR13			0x130
>  #define DCFG_RCWSR13_DSPI		(0 << 8)
> +#define DCFG_RCWSR15			0x138
> +#define DCFG_RCWSR15_IFCGRPABASE_QSPI	0x3
> 
>  #define DCFG_DCSR_BASE		0X700100000ULL
>  #define DCFG_DCSR_PORCR1		0x000
> diff --git a/board/freescale/ls2080aqds/ls2080aqds.c
> b/board/freescale/ls2080aqds/ls2080aqds.c
> index 6e73829..7e09f11 100644
> --- a/board/freescale/ls2080aqds/ls2080aqds.c
> +++ b/board/freescale/ls2080aqds/ls2080aqds.c
> @@ -207,6 +207,15 @@ int board_init(void)
>  	else
>  		config_board_mux(MUX_TYPE_SDHC);
> 
> +#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
> +	val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
> +
> +	if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))


What about this

If (val & (u32) DCFG_RCWSR15_IFCGRPABASE_QSPI) != 0)

> +		QIXIS_WRITE(brdcfg[9],
> +			    (QIXIS_READ(brdcfg[9]) & 0xf8) |
> +			     FSL_QIXIS_BRDCFG9_QSPI);
> +#endif
> +
>  #ifdef CONFIG_ENV_IS_NOWHERE
>  	gd->env_addr = (ulong)&default_environment[0];  #endif diff --git
> a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index
> 3cba10a..ee51348 100644
> --- a/include/configs/ls2080aqds.h
> +++ b/include/configs/ls2080aqds.h
> @@ -307,6 +307,12 @@ unsigned long get_board_ddr_clk(void);  #define
> CONFIG_SPI_FLASH_SPANSION
>  #define FSL_QSPI_FLASH_SIZE		(1 << 26) /* 64MB */
>  #define FSL_QSPI_FLASH_NUM		4
> +/*
> + * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
> + * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0
> + * If boot from IFCCard NAND, ISO1 = 0, ISO2 = 0, IBOOT = 1  */

A minor comment, Put "*/" in next line.  If you want can skip :)

--prabhakar